Abstract: A universal ultrasound device having an ultrasound probe includes a semiconductor die; a plurality of ultrasonic transducers integrated on the semiconductor die, the plurality of ultrasonic transducers configured to operate a first mode associated with a first frequency range and a second mode associated with a second frequency range, wherein the first frequency range is at least partially non-overlapping with the second frequency range; and control circuitry configured to: control the plurality of ultrasonic transducers to generate and/or detect ultrasound signals having frequencies in the first frequency range, in response to receiving an indication to operate the ultrasound probe in the first mode; and control the plurality of ultrasonic transducers to generate and/or detect ultrasound signals having frequencies in the second frequency range, in response to receiving an indication to operate the ultrasound probe in the second mode.

Abstract: A system comprising a multi-modal ultrasound probe configured to operate in a plurality of operating modes associated with a respective plurality of configuration profiles; and a computing device coupled to the handheld multi-modal ultrasound probe and configured to, in response to receiving input indicating an operating mode selected by a user, cause the multi-modal ultrasound probe to operate in the selected operating mode.

Abstract: An ultrasound-on-a-chip device has an ultrasonic transducer substrate with plurality of transducer cells, and an electrical substrate. For each transducer cell, one or more conductive bond connections are disposed between the ultrasonic transducer substrate and the electrical substrate. Examples of electrical substrates include CMOS chips, integrated circuits including analog circuits, interposers and printed circuit boards.

Abstract: A system comprising a multi-modal ultrasound probe configured to operate in a plurality of operating modes associated with a respective plurality of configuration profiles; and a computing device coupled to the handheld multi-modal ultrasound probe and configured to, in response to receiving input indicating an operating mode selected by a user, cause the multi-modal ultrasound probe to operate in the selected operating mode.

Abstract: A universal ultrasound device having an ultrasound includes a semiconductor die; a plurality of ultrasonic transducers integrated on the semiconductor die, the plurality of ultrasonic transducers configured to operate a first mode associated with a first frequency range and a second mode associated with a second frequency range, wherein the first frequency range is at least partially non-overlapping with the second frequency range; and control circuitry configured to: control the plurality of ultrasonic transducers to generate and/or detect ultrasound signals having frequencies in the first frequency range, in response to receiving an indication to operate the ultrasound probe in the first mode; and control the plurality of ultrasonic transducers to generate and/or detect ultrasound signals having frequencies in the second frequency range, in response to receiving an indication to operate the ultrasound probe in the second mode.

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract: Electrical biasing of ultrasonic transducers of an ultrasound device is described. The ultrasonic transducers may be capacitive micromachined ultrasonic transducers (CMUTs). The ultrasonic transducers may be grouped together, with the different groups receiving different bias voltages. The bias voltages for the various groups of ultrasonic transducers may be selected to account for differences between the groups.

Abstract: Micromachined ultrasonic transducers formed in complementary metal oxide semiconductor (CMOS) wafers are described, as are methods of fabricating such devices. A metallization layer of a CMOS wafer may be removed by sacrificial release to create a cavity of an ultrasonic transducer. Remaining layers may form a membrane of the ultrasonic transducer.

Abstract: Micromachined ultrasonic transducers formed in complementary metal oxide semiconductor (CMOS) wafers are described, as are methods of fabricating such devices. A metallization layer of a CMOS wafer may be removed by sacrificial release to create a cavity of an ultrasonic transducer. Remaining layers may form a membrane of the ultrasonic transducer.

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract: Micromachined ultrasonic transducers formed in complementary metal oxide semiconductor (CMOS) wafers are described, as are methods of fabricating such devices. A metallization layer of a CMOS wafer may be removed by sacrificial release to create a cavity of an ultrasonic transducer. Remaining layers may form a membrane of the ultrasonic transducer.

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract: Photovoltaic semiconductor devices and associated methods are provided. In one aspect, for example, a method of making a photovoltaic semiconductor device having enhanced electromagnetic radiation absorption can include applying a damage removal etch (DRE) to a semiconductor material to an RMS surface roughness of from about 0.5 nm to about 50 nm and texturing a single side of the semiconductor material. The texturing further includes irradiating a target region of the semiconductor material with laser radiation to create features having a size of from about 50 nm to about 10 microns.

Abstract: Photosensitive semiconductor devices and associated methods are provided. In one aspect, a semiconductor device can include a semiconductor substrate and a semiconductor layer coupled to the semiconductor substrate, where the semiconductor layer has a device surface opposite the semiconductor substrate. The device also includes at least one textured region coupled between the semiconductor substrate and the semiconductor layer. In another aspect, the device further includes at least one dielectric layer coupled between the semiconductor substrate and the semiconductor layer.

Abstract: Radiation-absorbing semiconductor devices and associated methods of making and using are provided. In one aspect, for example, a method for making a radiation-absorbing semiconductor device having enhanced photoresponse can include forming an active region on a surface of a low oxygen content semiconductor, and annealing the low oxygen content semiconductor to a temperature of from about 300° C. to about 1100° C., wherein the forming of the active region and the annealing of the low oxygen content semiconductor are performed in a substantially oxygen-depleted environment.