Patents by Inventor Susan A. Alie

Susan A. Alie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7910391
    Abstract: The present disclosure relates to methods of treating a silicon substrate with an ultra-fast laser to create a getter material for example in a substantially enclosed MEMS package. In an embodiment, the laser treating comprises irradiating the silicon surface with a plurality of laser pulses adding gettering microstructure to the treated surface. Semiconductor based packaged devices, e.g. MEMS, are given as examples hereof.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: March 22, 2011
    Assignee: SiOnyx, Inc.
    Inventor: Susan Alie
  • Publication number: 20100090347
    Abstract: The present disclosure is directed to the preparation of a semiconductor substrate, and metallization of a contact area on the substrate to produce a contact in a semiconductor device. The method includes pre-treating the substrate by ultra fast laser treatment of a contact area, and depositing an interconnect metal layer on the contact area to create a contact. The process may include depositing a layer of dielectric-forming material on the substrate and removing a portion of the dielectric material from the substrate to reveal a contact area, prior to laser treating and metallization.
    Type: Application
    Filed: October 9, 2008
    Publication date: April 15, 2010
    Inventors: Stephen D. Saylor, Susan Alie
  • Publication number: 20090261464
    Abstract: The present disclosure relates to methods of treating a silicon substrate with an ultra-fast laser to create a getter material for example in a substantially enclosed MEMS package. In an embodiment, the laser treating comprises irradiating the silicon surface with a plurality of laser pulses adding gettering microstructure to the treated surface. Semiconductor based packaged devices, e.g. MEMS, are given as examples hereof.
    Type: Application
    Filed: September 4, 2008
    Publication date: October 22, 2009
    Applicant: SIONYX, INC.
    Inventor: Susan Alie
  • Publication number: 20060118946
    Abstract: An apparatus has first and second wafers, and a conductive rim between the first and second wafers. The conductive rim electrically and mechanically connects the first and second wafers. In addition, the conductive rim and second wafer at least in part seal an area on the surface of the first wafer.
    Type: Application
    Filed: October 11, 2005
    Publication date: June 8, 2006
    Inventors: Susan Alie, Bruce Wachtmann, Michael Judy, David Kneedler
  • Patent number: 7034393
    Abstract: An apparatus has first and second wafers, and a conductive rim between the first and second wafers. The conductive rim electrically and mechanically connects the first and second wafers. In addition, the conductive rim and second wafer at least in part seal an area on the surface of the first wafer.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: April 25, 2006
    Assignee: Analog Devices, Inc.
    Inventors: Susan A. Alie, Bruce K. Wachtmann, Michael Judy, David Kneedler
  • Patent number: 6956274
    Abstract: A metallization stack is provided for use as a contact structure in an integrated MEMS device. The metallization stack comprises a titanium-tungsten adhesion and barrier layer formed with a platinum layer formed on top. The platinum feature is formed by sputter etching the platinum in argon, followed by a wet etch in aqua regia using an oxide hardmask. Alternatively, the titanium-tungsten and platinum layers are deposited sequentially and patterned by a single plasma etch process with a photoresist mask.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: October 18, 2005
    Assignee: Analog Devices, Inc.
    Inventors: Susan A. Alie, Bruce K. Wachtmann, David S. Kneedler, Scott Limb, Kieran Nunan
  • Patent number: 6936918
    Abstract: A MEMS device has at least one conductive path extending from the top facing side of its substrate (having MEMS structure) to the bottom side of the noted substrate. The at least one conductive path extends through the substrate as noted to electrically connect the bottom facing side with the MEMS structure.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: August 30, 2005
    Assignee: Analog Devices, Inc.
    Inventors: Kieran P. Harney, Lawrence E. Felton, Thomas Kieran Nunan, Susan A. Alie, Bruce Wachtmann
  • Publication number: 20050170609
    Abstract: A conductive bond for through-wafer interconnect is produced by forming an electrode through a first wafer from a component on a front side of the first wafer to a back side of the first wafer, forming a first electrically conductive interface in contact with an exposed portion of the electrode on the back side of the first wafer, and conductively bonding the first electrically conductive interface with a second electrically conductive interface on a second wafer under pressure at a temperature below the thermal budget of the stacked wafer device. The process temperature is generally well below the melting points of the electrically conductive interfaces. In some embodiments, the conductive bonding may be facilitated or enabled by performing the conductive bonding in a vacuum.
    Type: Application
    Filed: February 3, 2005
    Publication date: August 4, 2005
    Inventors: Susan Alie, Bruce Wachtmann, Lawrence Felton, Changhan Yun
  • Publication number: 20050127499
    Abstract: A MEMS device has at least one conductive path extending from the top facing side of its substrate (having MEMS structure) to the bottom side of the noted substrate. The at least one conductive path extends through the substrate as noted to electrically connect the bottom facing side with the MEMS structure.
    Type: Application
    Filed: April 19, 2004
    Publication date: June 16, 2005
    Inventors: Kieran Harney, Lawrence Felton, Thomas Kieran Nunan, Susan Alie, Bruce Wachtmann
  • Publication number: 20050127525
    Abstract: An apparatus has first and second wafers, and a conductive rim between the first and second wafers. The conductive rim electrically and mechanically connects the first and second wafers. In addition, the conductive rim and second wafer at least in part seal an area on the surface of the first wafer.
    Type: Application
    Filed: December 15, 2003
    Publication date: June 16, 2005
    Inventors: Susan Alie, Bruce Wachtmann, Michael Judy, David Kneedler
  • Patent number: 6878626
    Abstract: A metallization stack is provided for use as a contact structure in an integrated MEMS device. The metallization stack includes a titanium-tungsten adhesion and barrier layer formed with a platinum layer formed on top. The platinum feature is formed by sputter etching the platinum in argon, followed by a wet etch in aqua regia using an oxide hardmask. Alternatively, the titanium-tungsten and platinum layers are deposited sequentially and patterned by a single plasma etch process with a photoresist mask.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: April 12, 2005
    Assignee: Analog Devices, Inc.
    Inventors: Susan A. Alie, Bruce K. Wachtmann, David S. Kneedler, Scott Limb, Kieran Nunan
  • Patent number: 6821561
    Abstract: A shadow mask material is selected so that the expansion characteristics of the shadow mask during thin film deposition closely match the expansion characteristics of the substrate. The shadow mask material is typically one with a low coefficient of thermal expansion (CTE). The shadow mask material must typically meet additional criteria, such as mechanical strength, feature quality, and dimensional accuracy criteria.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: November 23, 2004
    Assignee: Analog Devices, Inc.
    Inventors: Javier Villarreal, Susan A. Alie
  • Publication number: 20030185976
    Abstract: A shadow mask material is selected so that the expansion characteristics of the shadow mask during thin film deposition closely match the expansion characteristics of the substrate. The shadow mask material is typically one with a low coefficient of thermal expansion (CTE). The shadow mask material must typically meet additional criteria, such as mechanical strength, feature quality, and dimensional accuracy criteria.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 2, 2003
    Inventors: Javier Villarreal, Susan A. Alie
  • Publication number: 20030132522
    Abstract: A metallization stack is provided for use as a contact structure in an integrated MEMS device. The metallization stack comprises a titanium-tungsten adhesion and barrier layer formed with a platinum layer formed on top. The platinum feature is formed by sputter etching the platinum in argon, followed by a wet etch in aqua regia using an oxide hardmask. Alternatively, the titanium-tungsten and platinum layers are deposited sequentially and patterned by a single plasma etch process with a photoresist mask.
    Type: Application
    Filed: January 11, 2002
    Publication date: July 17, 2003
    Inventors: Susan A. Alie, Bruce K. Wachtmann, David S. Kneedler, Scott Limb, Kieran Nunan
  • Patent number: 6508561
    Abstract: Optical mirror coatings are used for high-temperature diffusion barriers and mirror shaping. Certain materials for use as high-temperature diffusion barriers under optical mirror coatings include metals that have high melting and/or boiling points and amorphous and partially recrystallized inorganic amorphous materials that have high glass transition temperatures (Tg). Candidate metals are selected based upon the boiling point or a combination of melting point and boiling point. Candidate amorphous and partially recrystallized inorganic amorphous materials are selected based upon the glass transition temperature. Optical mirrors having such high-temperature diffusion barriers maintain reflectivity when exposed to elevated temperatures, and are particularly useful in optical Micro Electro-Mechanical Systems (MEMS) that are exposed to high-temperature manufacturing processes. Optical mirrors are shaped using tensile and/or compressive films.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: January 21, 2003
    Assignee: Analog Devices, Inc.
    Inventors: Susan A. Alie, Allyson Hartzell, Maurice Karpman, John R. Martin, Kieran Nunan