Abstract: A method and apparatus is provided for detecting the output power of an RF power amplifier for purposes of controlling the output power. A circuit for generating an output power control signal includes a power detector to detect the output power of an RF power amplifier. A variable gain amplifier is coupled to the power detector for amplifying the output of the power detector. The value of the generated control signal is a function of the gain of the variable gain amplifier.

Abstract: A method and apparatus is provided for detecting the output power of an RF power amplifier for purposes of controlling the output power. A circuit for generating an output power control signal includes a power detector to detect the output power of an RF power amplifier. A variable gain amplifier is coupled to the power detector for amplifying the output of the power detector. The value of the generated control signal is a function of the gain of the variable gain amplifier.

Abstract: A method and apparatus is provided for detecting the output power of a power amplifier. The output power is detected by detecting the absolute values of the voltage and current at the output of the amplifier and mixing the detected voltage and current to generate a signal related to the output power.

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.

Abstract: A charge processing circuit which integrates charge at an output node that is representative of an input charge provided at an input node. The circuit includes a precharge path coupled to the input node, the precharge path operable for setting the potential of the input node to a fixed precharge potential prior to introduction of input charge to the input node. A sensing path is coupled to the input and output nodes which is operable for returning the potential of the input node to the fixed precharge potential subsequent to introduction of input charge to the input node. A feedback element has an input coupled to the sensing path and the precharge path, the feedback element operable for setting said fixed precharge potential. In another embodiment there is provided a method of integrating charge at an output node of a charge processing circuit that is representative of input charge provided at an input node.

Abstract: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.

Abstract: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.

Abstract: A method and apparatus is provided for detecting the output power of an RF power amplifier for purposes of controlling the output power. A circuit for generating an output power control signal includes a power detector to detect the output power of an RF power amplifier. A variable gain amplifier is coupled to the power detector for amplifying the output of the power detector. The value of the generated control signal is a function of the gain of the variable gain amplifier.

Abstract: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.

Abstract: A pipelined oversampling analog-to-digital converter having a first conversion block including inputs for receiving an analog input signal and an analog reference signal, and a plurality of conversion blocks following the first conversion block. Each conversion block includes means for receiving the analog input signal and the analog reference signal, and at least one analog integrator input and at least one digital decimator input from a previous conversion block; a D/A converter having at least one distinct analog output level and an analog input of the analog reference signal; at least one integrator; a quantizer that computes at least one bit as an output; means for combining the output of the quantizer with the at least one digital decimator input; and means for providing an analog output signal output, at least one analog integrator output, and at least one digital decimator output to a following conversion block.

Abstract: A charge generation device configured within a semiconductor region of a substrate. The device includes a source for providing an input charge and an input diffusion which receives said input charge. A barrier gate associated with the input diffusion determines a selected potential of the input diffusion. A preset diffusion presets the input diffusion to the selected potential. An output element receives the input charge from the input diffusion. A first coupling means is provided for coupling the preset diffusion to the input diffusion subsequent to the output diffusion receiving the input charge during a first clock cycle, and for decoupling the preset diffusion from the input diffusion prior to the input diffusion receiving the input charge during a second clock cycle.

Abstract: A charge-to-digital converter including a pipeline of at least one conversion unit, each conversion unit operable for processing a serial stream of positive and negative signal charges corresponding to a differential signal to be digitized and scaling charges corresponding to a full-scale signal, and for generating a digital output signal. Each of the conversion units includes the following; A receiver which receives positive and negative signal charges and a scaling signal from a predetermined source. Certain embodiments include positive and negative signal channels having a distributed sensing pipeline operable for respectively producing positive and negative accumulator charges representative of the positive and negative signal charges. A unit for generating a modification charge corresponding to a predetermined proportion of the full-scale signal. A comparator for comparing the positive and negative accumulator charges and generating the digital output signal in accordance with the comparator result.