Abstract: Dispersion of load may be kept within an allowance even when a plurality of probes in a large area are pressed in batch by pressing the probes provided in a membrane to a wafer by applying a pressure load to a plurality of places of a plane of pressure members on the side opposite from the wafer in a probe test step/burn-in test step which is one of semiconductor device manufacturing steps. It is then possible to provide semiconductor devices and a manufacturing method thereof which enhance the reliability and productivity of the semiconductor devices by probing a large number of integrated circuits or a large size integrated circuit in the same time.

Abstract: To achieve high speed exchange of electrical signals between a connection device and a tester, a support member is provided for supporting the connection device, a plurality of pointed contact terminals are arrayed in an area on the probing side, a multiplayer film is provided having a plurality of lead out wires electrically connected to the contact terminals and a ground layer enclosing an insulation layer, and a frame is clamped on the rear side of the multiplayer film. A clamping member is provided on the frame to make the multiplayer film project out to eliminate slack in the multiplayer film. A contact pressure means is provided for making the tips of the contact terminals contact each of the electrodes with predetermined contact pressure from the support member to the clamping member.

Abstract: A connection device and test system is capable of stable, low load damage-free probing of devices under test, which have many pins with a narrow pitch. Furthermore in order to achieve high speed exchange of electrical signals or so-called high frequency electrical signals, a support member is provided for supporting the connection device, a plurality of pointed contact terminals are arrayed in an area on the probing side, a multilayer film is provided having a plurality of lead out wires electrically connected to the contact terminals and a ground layer enclosing an insulation layer, and a frame is clamped on the rear side of the multilayer film.

Abstract: Dispersion of a load may be kept within a predetermined allowance even when a plurality of probes in a large area are pressed in batch by pressing the probes provided in a membrane against a wafer by applying a pressure load to a plurality of places on a plane of the pressure members on the side opposite the wafer in a probe test step, burn-in test step which represent typical semiconductor device manufacturing steps. It is then possible to provide semiconductor devices and a manufacturing method thereof which enhance the reliability and productivity of the semiconductor devices by probing a large number of integrated circuits or a large size integrated circuit at the same time.

Abstract: The present invention relates to a manufacturing method of a probe head for an inspection apparatus of a semiconductor device represented by an LSI, and more particularly to a manufacturing method suitable for forming probes with high accuracy in forming into multipins at high density, and is characterized in that a structure is obtained, in which a probe forming conductive lower layer is formed on a formed conductive attaching layer for improving attaching strength after forming electrode pads on a wiring substrate, a mask pattern for forming a probe tip forming conductive upper layer is formed at a position corresponding to the probe position is removed by etching in a cylindrical form until the probe forming conductive lower layer is exposed, a probe tip forming conductive upper layer is grown at the position where etching removal has been performed, a mask pattern is removed, a mask pattern which covers a probe tip forming conductive upper layer is formed thereafter at a position corresponding to the prob

Abstract: A probe head for use with equipment for testing a semiconductor device such as a large scale integrated circuit (LSI) includes electrode pads are formed on a circuit substrate, and a pad protecting conductive layer formed on the pads. A probe pin forming material is grown which is worked into a pin-like configuration, thereby improving a pin assembling property of a probe head portion and this realizes highly accurate pinning with high reliability.

Abstract: A semiconductor device testing apparatus which has a plurality of probes and plurality of coaxial cables connected therewith for impedance matching and a plurality of springs for providing flexibility to the individual probes to absorb a level difference in the surface of a semiconductor device.The apparatus constructed in this manner allows for an effective test of a semiconductor device with a high density electrode arrangement.