Patents by Inventor Susumu Nagayama
Susumu Nagayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10821858Abstract: A front seat 31 is foldable such that a seat back 33 is frontwardly collapsed and placed on a seat cushion 32, a rear seat 39 is foldable such that a seat back 41 is frontwardly collapsed and placed on a seat cushion 40, and a trunk floor 53 extending from a front pillar 12 to a rear pillar 14 is formable by laying a trunk board 49 across a gap formed between a rear face of the seat back 33 of the front seat 31 and a rear face of the seat back 41 of the rear seat 39 with the front seat 31 and the rear seat 39 in a folded state.Type: GrantFiled: March 29, 2019Date of Patent: November 3, 2020Assignee: HONDA MOTOR CO., LTD.Inventors: Atsushi Ito, Maki Yamaguchi, Kazuhisa Nishimura, Yasunobu Kawamoto, Takahiro Ando, Hidenori Watanabe, Susumu Nagayama
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Patent number: 10437229Abstract: A numerical controller includes a machining program creation unit for receiving an input of a machining program including a cycle command, a tool path creation unit for creating a plurality of tool paths based on the machining program, a display unit for displaying the machining program and the plurality of tool paths, and a correspondence relation management unit for recording a relation between an argument of the cycle command and the plurality of tool paths in an information table, wherein the correspondence relation management unit receives a selection of a selected tool path corresponding to one of the plurality of tool paths, and specifies an argument of the cycle command corresponding to the selected tool path with reference to the information table, and the display unit displays the specified argument in a different form from a form of another argument in the machining program.Type: GrantFiled: December 1, 2016Date of Patent: October 8, 2019Assignee: Fanuc CorporationInventors: Susumu Nagayama, Akira Egashira, Hideaki Maeda
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Publication number: 20190299824Abstract: A front seat 31 is foldable such that a seat back 33 is frontwardly collapsed and placed on a seat cushion 32, a rear seat 39 is foldable such that a seat back 41 is frontwardly collapsed and placed on a seat cushion 40, and a trunk floor 53 extending from a front pillar 12 to a rear pillar 14 is formable by laying a trunk board 49 across a gap formed between a rear face of the seat back 33 of the front seat 31 and a rear face of the seat back 41 of the rear seat 39 with the front seat 31 and the rear seat 39 in a folded state.Type: ApplicationFiled: March 29, 2019Publication date: October 3, 2019Applicant: HONDA MOTOR CO., LTD.Inventors: Atsushi Ito, Maki Yamaguchi, Kazuhisa Nishimura, Yasunobu Kawamoto, Takahiro Ando, Hidenori Watanabe, Susumu Nagayama
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Publication number: 20170160716Abstract: A numerical controller includes a machining program creation unit for receiving an input of a machining program including a cycle command, a tool path creation unit for creating a plurality of tool paths based on the machining program, a display unit for displaying the machining program and the plurality of tool paths, and a correspondence relation management unit for recording a relation between an argument of the cycle command and the plurality of tool paths in an information table, wherein the correspondence relation management unit receives a selection of a selected tool path corresponding to one of the plurality of tool paths, and specifies an argument of the cycle command corresponding to the selected tool path with reference to the information table, and the display unit displays the specified argument in a different form from a form of another argument in the machining program.Type: ApplicationFiled: December 1, 2016Publication date: June 8, 2017Applicant: FANUC CORPORATIONInventors: Susumu Nagayama, Akira Egashira, Hideaki Maeda
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Publication number: 20070192707Abstract: A numerical controller in which similar icons are created without applying major load onto a memory. Among icon definition data displayed in areas F1 . . . , G1 . . . , H1 . . . , on frames A, B and C, the data that can be expressed by conversions, such as rotation, horizontal mirror image, vertical mirror image, horizontal-and-vertical mirror image, magnification/contraction retaining horizontal/vertical ratio, magnification/contraction varying horizontal/vertical ratio, black/white reversal, display in red, blue, yellow and green, with respect to one parent icon, are substituted with data indicating the conversion contents. It is possible to display many icons with a small storage capacity. The definition data of each icon can be previously written in a ROM and copied to a RAM when the power is turned on to be used for display.Type: ApplicationFiled: February 15, 2007Publication date: August 16, 2007Applicant: FANUC LTDInventors: Hideaki Maeda, Shinya Nakamura, Susumu Nagayama
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Machining limit area specifying method and manuel feed machining method using numerical control unit
Patent number: 6269283Abstract: A machining limit area specifying method and a manual feed machining method using a numerical control unit capable of easily performing machining in a desired shape by manual feed. In specifying a machining limit area on an X-Y plane, a desired machining shape is defined by shaping data or a combination of some shaping data on the X-Y plane at a predetermined Z-coordinate, and the desired machining shape defined by the shaping data is specified as a machining limit area in which movement of a tool is permitted on the X-Y plane in manual machining using the numerical control unit. In specifying a machining limit area in the Z-axis direction, an inverse function using an X- or Y-coordinate value as a parameter is obtained based on a function for specifying the machining limit area on the X-Y plane on condition that a Z-coordinate value is used as a parameter, and the machining limit area in the Z-axis direction is specified based on the inverse function.Type: GrantFiled: May 19, 1998Date of Patent: July 31, 2001Assignee: Fanuc LimitedInventors: Satoru Shinozaki, Susumu Nagayama -
Patent number: 6155148Abstract: A basic spiral operation of a tool is controlled by storing, in a controller, an automatic operation program of a threading cycle which regulates the basic spiral operation of the tool corresponding to a thread shape by specifying a spindle revolving speed RC, a thread lead ZR and a thread cutting finish point Z2 or the like. A depth of cut by the tool is determined by an operator who operates a handle of a manual pulse generator to cut the work and confirms the cutting conditions.Type: GrantFiled: July 20, 1998Date of Patent: December 5, 2000Assignee: Fanuc Ltd.Inventors: Satoru Shinozaki, Susumu Nagayama
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Patent number: 5296405Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, a semiconductor layer is formed and then undergoes photo annealing. A neutralizer is then introduced to the photoannealed semiconductor. The semiconductor thus formed demonstrates the SEL effect instead of the Staebler-Wronski effect.Type: GrantFiled: August 24, 1992Date of Patent: March 22, 1994Assignee: Semiconductor Energy Laboratory Co.., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 5171710Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, a semiconductor layer is formed and then undergoes photo annealing. A neutralizer is then introduced to the photoannealed semiconductor. The semiconductor thus formed demonstrates the SEL effect instead of the Staebler-Wronski effect.Type: GrantFiled: May 9, 1990Date of Patent: December 15, 1992Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 5089426Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for provessing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes. By virtue of this configuration, short current paths do not result even if transparent electrode is provided on the semiconductor layer.Type: GrantFiled: January 16, 1990Date of Patent: February 18, 1992Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Masato Susukida, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Kaoru Koyanagi, Susumu Nagayama
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Patent number: 4986213Abstract: An improved semiconductor processing is desclosed. In the manufacturing process, just formed semiconductor layer undergoes photo annealing and latent dangling bonds are let appear on the surface and gaps, then neutralizer is introduced to the ambience of the semiconductor. The semiconductor thus formed demonstrates SEL effect in place of Staebler-Wronski effect.Type: GrantFiled: September 28, 1988Date of Patent: January 22, 1991Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 4970369Abstract: In a method of making an electronic device having at least a transparent conductive layer, which includes at least a step of forming a transparent conductive layer member and a step of forming a transparent conductive layer by patterning the transparent conductive layer member using a spot-shaped or linear laser beam or beams, each of which has a short wavelength of 400 nm or less and optical energy greater than the optical energy band gap of the transparent conductive layer.Type: GrantFiled: April 6, 1989Date of Patent: November 13, 1990Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kenji Itoh, Susumu Nagayama
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Patent number: 4970368Abstract: In a method of making an electronic device having at least a transparent conductive layer, which includes at least a step of forming a transparent conductive layer member and a step of forming a transparent conductive layer by patterning the transparent conductive layer member using a spot-shaped or linear laser beam or beams, each of which has a short wavelength of 400 nm or less and optical energy greater than the optical energy band gap of the transparent conductive layer.Type: GrantFiled: April 6, 1989Date of Patent: November 13, 1990Assignee: Semiconductor Energy Laboratory Co. Ltd.Inventors: Shunpei Yamazaki, Kenji Itoh, Susumu Nagayama
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Patent number: 4937651Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes.Type: GrantFiled: August 22, 1986Date of Patent: June 26, 1990Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
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Patent number: 4888305Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, just formed semiconductor layer undergoes photo annealing and latent dangling bonds are let appear on the surface and gaps, then neutralizer is introduced to the ambience of the semiconductor. The semiconductor thus formed demonstrates SEL effect in place of Staebler-Wronski effect.Type: GrantFiled: March 9, 1989Date of Patent: December 19, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 4874920Abstract: In a method of making an electronic device having at least a transparent conductive layer, which includes at least a step of forming a transparent conductive layer member and a step of forming a transparent conductive layer by patterning the transparent conductive layer member using a spot-shaped or linear laser beam or beams, each of which has a short wavelength of 400 nm or less and optical energy greater than the optical energy band gap of the transparent conductive layer.Type: GrantFiled: January 13, 1989Date of Patent: October 17, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kenji Itoh, Susumu Nagayama
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Patent number: 4847669Abstract: An improved tandem photoelectric conversion device is shown. The device comprises at least two photoelectric conversion semiconductor assemblies. The assembly located behind the other has higher crystallinity then the other, so that light with a long wavelength passing through the front assembly be converted into electricity at the back assembly. In the device, an intrinsic semiconductor layer is formed by an ECR CVD system.Type: GrantFiled: December 17, 1986Date of Patent: July 11, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masayoshi Abe, Susumu Nagayama, Kunio Suzuki, Takeshi Fukada, Mikio Kinka, Katsuhiko Shibata, Masato Susukida
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Patent number: 4826711Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, fluorine gas is introduced just after formation of semiconductor layer in a reaction. The semiconductor thus formed demonstrates SEL effect in place of Staebler-Wronski effect.Type: GrantFiled: August 8, 1986Date of Patent: May 2, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama
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Patent number: 4812415Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processing a semiconductor device is shown. According to the invention, gaps produced during the fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes. By virtue of this configuration, short current paths do not result when electrodes are provided on the semiconductor layer.Type: GrantFiled: August 6, 1987Date of Patent: March 14, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
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Patent number: 4806496Abstract: Photoelectric conversion devices are manufactured at high yield by repairing the devices during the final steps of the manufacuturing process. Short current paths resulting from the formation process of semiconductor layers can be eliminated by applying a reverse voltage to the layers, which thus are heated and made insulating. After the elimination of the short current paths, the reverse current no longer passes beyond 15 mA on a reverse voltage of 8 V.Type: GrantFiled: January 28, 1987Date of Patent: February 21, 1989Assignee: Semiconductor Energy Laboratory Co. Ltd.Inventors: Kunio Suzuki, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Mikio Kinka, Takeshi Fukada, Susumu Nagayama, Masayoshi Abe, Shunpei Yamazaki