Abstract: A radio frequency receiver having a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency.

Abstract: Systems and methods of noise suppression by an amplifier are presented. In one exemplary embodiment, an amplifier comprises first and fourth transistors configured as a first differential pair of transistors in a common-gate configuration, and second and third transistors configured as a second differential pair of transistors in a common-source configuration. The first and fourth transistors are operative to receive, from a differential input, by a source of each first and fourth transistor, a differential input signal. Further, a drain of each first and fourth transistor is coupled to respective first and second outputs configured as a differential output. The second and third transistors are operative to output, from a drain of each second and third transistor, to the respective second and first outputs, a differential output signal. Further, a gate of each second and third transistor is coupled to the respective first and second inputs.

Abstract: The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency.

Abstract: A mobile communications terminal comprising a radio frequency interface configured to operate at least at a first configuration, and a controller, wherein said controller is configured to determine that a reconfiguration of the radio frequency interface is to be performed, determine a timing of the reconfiguration and reconfigure said radio frequency interface to operate at a second configuration at the determined timing, wherein said controller is configured to determine said timing based on the type of reconfiguration to be made.

Abstract: A radio frequency receiver having a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: An amplifier (100) adapted for noise suppression comprises a first input (102) for receiving a first input signal and a second input (104) for receiving a second input signal, the first and second input signals constituting a differential pair. A first output (106) delivers a first output signal and a second output (108) delivers a second output signal, the first and second output signals constituting a differential pair. A first transistor (MCG1) has a first drain (110) coupled to the first output (106) such that all signal current, except parasitic losses, flowing through the first drain (110) flows through the first output (106), and the first transistor (MCG1) further having a first source (112) coupled to the first input (102).

Abstract: A radio frequency receiver comprises a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: A radio frequency receiver comprises a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: An amplifier (100) adapted for noise suppression comprises a first input (102) for receiving a first input signal and a second input (104) for receiving a second input signal, the first and second input signals constituting a differential pair. A first output (106) delivers a first output signal and a second output (108) delivers a second output signal, the first and second output signals constituting a differential pair. A first transistor (MCG1) has a first drain (110) coupled to the first output (106) such that all signal current, except parasitic losses, flowing through the first drain (110) flows through the first output (106), and the first transistor (MCG1) further having a first source (112) coupled to the first input (102).

Abstract: A frequency selective circuit configured to convert an analog input signal to a digital output signal comprises an analog-to-digital converter (44) to generate the digital output signal of the circuit based on an analog input signal to the analog-to-digital converter (44); a digital-to-analog converter (46, 47) to generate an analog feedback signal based on the digital output signal from the analog-to-digital converter (44), and an analog filter arranged to generate the analog input signal to the analog-to-digital converter based on the analog feedback signal and an analog input signal to the circuit. The analog filter comprises at least two integrators (41, 42) in series, each having a feedback path comprising the analog-to-digital converter (44) in cascade with a digital-to-analog converter (46, 47), so that the overall noise transfer function of the circuit has at least two zeros in addition to zeros in the noise transfer function of the analog-to-digital converter.

Abstract: An amplifier (100) comprising: first, second, third and fourth transistors (M1, M2, M3, M4), an input (10) for an input signal, and a first output (22) for a first amplified signal; a first terminal (T11) of the first transistor (M1) coupled to a first voltage rail (12), a second terminal (T12) of the first transistor (M1) coupled to a first terminal (T31) of the third transistor (M3), and a gate (G1) of the first transistor (M1) coupled to the input (10); a first terminal (T21) of the second transistor (M2) coupled to a second voltage rail (14), a second terminal (T22) of the second transistor (M2) coupled to the first output (22), and a gate (G2) of the second transistor (M2) coupled to the input (10); a load (40) coupled between a second terminal (T32) of the third transistor (M3) and a third voltage rail (20), and a gate (G3) of the third transistor (M3) coupled to a bias node (16) for applying a bias voltage to the gate (G3) of the third transistor (M3); a first terminal (T41) of the fourth transistor

Abstract: A noise-canceling LNA circuit for amplifying signals at an operating frequency f in a receiver circuit is disclosed. The LNA circuit comprises a first and a second amplifier branch, each having an input terminal connected to an input terminal of the LNA circuit. The first amplifier branch comprises an output terminal for supplying an output current of the first amplifier branch and a common source or common emitter main amplifier. The main amplifier has an input transistor having a first terminal, which is a gate or base terminal, operatively connected to the input terminal of the first amplifier branch, a shunt-feedback capacitor operatively connected between the first terminal of the input transistor and a second terminal, which is a drain or collector terminal, of the input transistor, and an output capacitor operatively connected between the second terminal of the input transistor and the output terminal of the first amplifier branch.

Abstract: An amplifier (100) comprising: first, second, third and fourth transistors (M1, M2, M3, M4), an input (10) for an input signal, and a first output (22) for a first amplified signal; a first terminal (T11) of the first transistor (M1) coupled to a first voltage rail (12), a second terminal (T12) of the first transistor (M1) coupled to a first terminal (T31) of the third transistor (M3), and a gate (G1) of the first transistor (M1) coupled to the input (10); a first terminal (T21) of the second transistor (M2) coupled to a second voltage rail (14), a second terminal (T22) of the second transistor (M2) coupled to the first output (22), and a gate (G2) of the second transistor (M2) coupled to the input (10); a load (40) coupled between a second terminal (T32) of the third transistor (M3) and a third voltage rail (20), and a gate (G3) of the third transistor (M3) coupled to a bias node (16) for applying a bias voltage to the gate (G3) of the third transistor (M3); a first terminal (T41) of the fourth transistor

Abstract: In a passive mixer, switches and a capacitance are shared between bootstrapped mixing transistors, reducing the number of components required as compared to prior art bootstrap designs. Shared bootstrap circuits operate in an interleaved fashion between I and Q mixer circuits, at twice the LO frequency. That is, the shared bootstrap circuits in each I mixer circuit charge their capacitors in a first half-period of a clock, and connect the shared capacitor to the gate of an enabled mixing transistor in the second half-period. The shared bootstrap circuits in the Q mixer circuit charge their capacitors in the second half-period, and connect the shared capacitor to the gate of an enabled mixing transistor in the first half-period. One of two mixing transistors connected to each shared bootstrap circuit is alternately enabled during the clock signal half-periods that the shared bootstrap circuit is not charging its capacitor.

Abstract: A common source or common emitter LNA circuit for amplifying signals at an operating frequency f in a receiver circuit is disclosed. The LNA circuit comprises an input transistor arranged to, in operation, be biased to have a transconductance gm at the operating frequency f, and having a first terminal, which is a gate or base terminal, operatively connected to an input terminal of the LNA circuit. The LNA circuit further comprises a shunt-feedback capacitor operatively connected between the first terminal of the input transistor and a second terminal, which is a drain or collector terminal, of the input transistor. Furthermore, the LNA circuit comprises an output capacitor operatively connected between the second terminal of the input transistor and an output terminal of the LNA circuit. The output capacitor has a capacitance value CL<gm/f.

Abstract: A frequency selective circuit configured to convert an analog input signal to a digital output signal comprises an analog-to-digital converter (44) to generate the digital output signal of the circuit based on an analog input signal to the analog-to-digital converter (44); a digital-to-analog converter (46, 47) to generate an analog feedback signal based on the digital output signal from the analog-to-digital converter (44), and an analog filter arranged to generate the analog input signal to the analog-to-digital converter based on the analog feedback signal and an analog input signal to the circuit. The analog filter comprises at least two integrators (41, 42) in series, each having a feedback path comprising the analog-to-digital converter (44) in cascade with a digital-to-analog converter (46, 47), so that the overall noise transfer function of the circuit has at least two zeros in addition to zeros in the noise transfer function of the analog-to-digital converter.

Abstract: A mobile communications terminal comprising a radio frequency interface configured to operate at least at a first configuration, and a controller, wherein said controller is configured to determine that a reconfiguration of the radio frequency interface is to be performed, determine a timing of the reconfiguration and reconfigure said radio frequency interface to operate at a second configuration at the determined timing, wherein said controller is configured to determine said timing based on the type of reconfiguration to be made.

Abstract: A frequency translation filter 500 is configured to receive a radio frequency (RF) signal 501 comprising first and second non-contiguous carriers or non-contiguous frequency ranges. The frequency translation filter comprises a mixer 503 configured to mix the RF signal 501 received on a first input with a local oscillator (LO) signal 505 received on a second input. A filter 507 comprises a frequency dependent load impedance, the filter having band-pass characteristics which, when frequency translated using the mixer 503, contain first and second pass-bands corresponding to the first and second non-contiguous carriers or non-contiguous frequency ranges. The first and second pass-bands are centered about the local oscillator frequency.

Abstract: A method and system for achieving increased efficiency in a quadrature modulated power amplifier (11) are disclosed. In some embodiments, a supply path (36, 40) and a gain path (38, 42) are provided in each of an I-channel and a Q-channel. The supply path (36, 40) produces a variable voltage and the gain path (38, 42) produces a gain control signal. The variable voltage and gain control signal are used by a variable gain power amplifier (44, 46) to modulate a local oscillator signal to produce a modulated radio signal.