Abstract: A modulation circuit for use in a radiofrequency transmitter includes a local oscillator circuit configured to generate one or more local oscillator signals at a desired frequency and with a duty cycle at or about twenty-five percent, and a modulator configured to generate one or more modulated signals responsive to the one or more local oscillator signals and one or more baseband information signals. In at least one embodiment, the modulation circuit includes a modulator comprising a combined mixing and transconductance circuit that includes a transistor circuit for each baseband information signal serving as a modulation input to the modulator. Each transistor circuit comprises a first transistor driven by the baseband information signal and coupling a modulator output node to a corresponding transconductance element, and a second transistor driven by one of the one or more local oscillator signals and coupling the corresponding transconductance element to a signal ground node.

Abstract: A method and apparatus for minimizing harmonic content in a digital signal driver circuit are disclosed. A digital input signal applied to an input node generates a corresponding digital output in a circuit with two or more MOS devices in cascode connection with each other. The slew rate of leading or trailing edge transitions associated with the output signal are controlled using one or more parasitic capacitances associated with the fabrication of two or cascode connected MOS devices. The two or more cascode connected MOS devices may further each have gate electrodes connected to a fixed potential so as to minimize the harmonic content. A control signal may further be applied to each gate electrode to turn off a leakage current path between source and drain electrodes. Harmonics may further be controlled by limiting a conductance between gate electrodes and fixed potentials using an active or passive device.

Abstract: A method and apparatus for frequency synthesis in a transceiver are based on providing a primary frequency synthesizer configured to synthesize a receiver frequency signal from a receiver reference frequency signal, and providing an offset frequency synthesizer configured to synthesize a transmitter frequency signal from the receiver frequency signal using fractional-N division, which allows it to operate at an intermediate frequency that is a non-integer multiple of the receiver frequency signal. That arrangement enables non-integer duplex frequency distances between desired receive and transmit frequencies. The primary frequency synthesizer also may be operated as a fractional-N frequency synthesizer, meaning that the receiver frequency signal may have a non-integer relationship to the receiver reference frequency signal.

Abstract: An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.

Abstract: Disclosed are methods and circuit configurations for reference frequency signal distribution circuitry that suppress unwanted spurious components introduced by way of RF signal leakage. The methods and circuitry may include relocating components of a buffer along a reference frequency signal path, thereby suppressing conductive and inductive components associated with RF leakage paths entering the circuitry. A filter also may be used after the buffer to suppress spurious components resulting from subsampling of unwanted tones in a phase frequency detector or intermodulation between the reference signal and interference tones in the signal-path of the buffer.

Abstract: A method of estimating a DC offset value of a signal includes estimating a DC offset value of a preamble part of the signal using a pair of diodes (D1, D2) and a resistor (R) connected in parallel. During receipt of the data part of the signal, the diode pair (D1, D2) is switched out of the circuit by a switch (SW). During reception of the data part, the DC level is estimated using a low pass filter (R,C).

Abstract: An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.

Abstract: Method and system are disclosed for providing an improved linearity Gilbert mixer. The Gilbert mixer of the present invention includes a conventional mixer core coupled to a high linearity, multistage amplifier. The multistage amplifier includes two or more transistor stages connected together in a global feedback arrangement. The global feedback provides a greater loop gain for the amplifier than the local feedback arrangement, thereby increasing the linearity of the amplifier. In addition, having more than one transistor stage in the amplifier serves to increase the isolation of the RF input signal from the LO input signal. Furthermore, by providing parallel output stages in the multistage amplifier, several mixer cores may be driven from the same source while sharing the feedback mechanism.

Abstract: A radiofrequency (RF) receiver circuit and method offer one or more performance improvements, such as an increased input compression point through better out-of-band interference suppression. In one example, an RF receiver circuit includes a low-noise amplifier (LNA) circuit and a mixer. The mixer output signal serves as negative feedback to the LNA circuit for improved compression point performance at interferer frequencies in or out of band with respect to a frequency of interest. Compression point performance is further improved for interferer signal components away from the frequency of interest by including at least one frequency-dependent circuit in the LNA circuit that is configured to reduce amplifier gain for such frequencies. The frequency-dependent circuit(s) may be tunable for different frequencies of interest.

Abstract: An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.

Abstract: A balanced crystal oscillator circuit comprising: a piezoelectric element Xtal (207; 215; 222,221; 313); a first oscillator subcircuit (202; 210; 218; 302) incorporating a transistor (204;212;220;304); and a second oscillator subcircuit (201;209;217;301) incorporating a transistor (203; 211; 219; 303); wherein the transistors each have different types of transistor terminals (C,B,E; D;G;S), and wherein the oscillator subcircuits are configured with at least three interconnections. Each interconnection comprise a pair of like type of transistor terminals; wherein a first of said interconnections constitutes a connection to a ground reference (gnd); a second of said interconnections is via a first resonator element (207;215;223;313); and a third of said interconnections is via a second resonator element (208;216;224;314); said first and second circuits are arranged to interact by means of said first and second resonator elements to form a balanced oscillator signal.

Abstract: A phase-locked loop includes a phase detector, a loop filter, a voltage controlled oscillator and a frequency divider arranged such that the phase detector generates a phase detector output signal as a function of a phase difference between the reference clock signal and the feedback signal; the loop filter generates a frequency control signal from the phase detector output signal; the voltage controlled oscillator generates a phase-locked loop output signal that has a frequency that is controlled by the frequency control signal; and the frequency divider generates the feedback signal from the phase-locked loop output signal.

Abstract: A method of estimating a DC offset value of a signal includes estimating a DC offset value of a preamble part of the signal using a pair of diodes (D1, D2) and a resistor (R) connected in parallel. During receipt of the data part of the signal, the diode pair (D1, D2) is switched out of the circuit by a switch (SW). During reception of the data part, the DC level is estimated using a low pass filter (R,C).

Abstract: A dual-radio communication apparatus has a first radio device, such as a Bluetooth radio, for use in a first frequency band, and a second radio device, such as a Globalstar satellite radio, for use in a second frequency band, which is proximate to the first frequency band. The communication apparatus also has a controller coupled to the first and second radio devices. The first radio device may comprise a frequency-hopping spread-spectrum transmitter. Moreover, the first radio device has a first operating mode employing a first frequency range. The first radio device also has a second operating mode employing a second frequency range, which is smaller than the first frequency range. The controller is adapted to set the first radio device in its second operating mode, when the second radio device is in operation, and otherwise set the first radio device in its first operating mode.

Abstract: Disclosed are methods and circuit configurations for reference frequency signal distribution circuitry that suppress unwanted spurious components introduced by way of RF signal leakage. The methods and circuitry may include relocating components of a buffer along a reference frequency signal path, thereby suppressing conductive and inductive components associated with RF leakage paths entering the circuitry. A filter also may be used after the buffer to suppress spurious components resulting from subsampling of unwanted tones in a phase frequency detector or intermodulation between the reference signal and interference tones in the signal-path of the buffer.

Abstract: A proximity detector for use in a mobile telephone having at least a microphone and a loudspeaker operatively connected to a signal processor is presented. The proximity detector includes data processing and control modules having a module for controlling the signal processor for activating the loudspeaker to reproduce an acoustic control signal. A correlator correlates a control signal received directly by the microphone and a control signal being reflected from a user of the telephone and then received by the microphone to determine the distance between the telephone and the user. A signal level controller controls the signal processor to vary the signal level of an audible signal reproduced by the loudspeaker depending on the determined distance between the telephone and the user.

Abstract: A method of estimating a DC offset value of a signal includes estimating a DC offset value of a preamble part of the signal using a pair of diodes (D1, D2) and a resistor (R) connected in parallel. During receipt of the data part of the signal, the diode pair (D1, D2) is switched out of the circuit by a switch (SW). During reception of the data part, the DC level is estimated using a low pass filter (R,C).

Abstract: A proximity detector for use in a mobile telephone having at least a microphone and a loudspeaker operatively connected to a signal processor is presented. The proximity detector includes data processing and control modules having a module for controlling the signal processor for activating the loudspeaker to reproduce an acoustic control signal. A correlator correlates a control signal received directly by the microphone and a control signal being reflected from a user of the telephone and then received by the microphone to determine the distance between the telephone and the user. A signal level controller controls the signal processor to vary the signal level of an audible signal reproduced by the loudspeaker proportionally to the determined distance between the telephone and the user.

Abstract: In a radio communications unit with several transceivers communicating in different frequency bands, a signal parameter of a selected channel is monitored in order to detect interference due to intermodulation products. The select channel is for example used by a long range radio communications link and the interfering channel on a short range radio link. Once the channel causing interference has been identified, transmissions on it are prevented.

Abstract: An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.