Abstract: A method and system to route connections of sub-networks in a design block of an integrated circuit and a computer program product are described. The system includes a memory device to store instructions to route the connections of the sub-networks, and a processor to execute the instructions to determine a baseline route for each of the connections of each of the sub-networks, identify noise critical sub-networks in the integrated circuit design based on congestion, set a mean threshold length (MTL), segment the connections of the noise critical sub-networks based on the MTL, and re-route the baseline route based on segmenting. The MTL indicates a maximum length of each segment of each connection, each segment includes a different wirecode than an adjacent segment, and the wirecode defines a width, metal layer, and spacing for the segment.

Abstract: A technique for routing signal wires in an integrated circuit design includes applying a first rule that attempts to route a signal wire along existing power supply shapes of the integrated circuit design and applying a second rule that provides shield wires along segments of the signal wire that are not routed along one of the existing power supply shapes. The technique also includes routing the signal wire between a first endpoint and a second endpoint while applying the first and second rules to substantially minimize a route cost for the signal wire between the first and second endpoints.

Abstract: A mechanism is provided in a data processing system for timing-driven routing for noise reduction in integrated circuit design. Responsive to performing timing driving routing on an integrated circuit design, the mechanism identifies a set of noise-critical nets in the integrated circuit design. The mechanism performs timing driven routing on the integrated circuit design with noise constraints based on the set of noise-critical nets.

Abstract: A region of congestion is detected at a set of layers. The region occupies the same area of each layer in the set. A routing blockage is defined as a tuple corresponding to the region. The tuple includes a set of coordinates to describe an area of the region, a first and a second layer coordinates of a first and a second layer in the set of layers. The routing blockage is applied during an iteration of rough routing. Before an iteration of detailed routing, the routing blockage is removed. Detailed routing is performed using a g-cell in the region. The detailed routing uses a routing capacity saved in the g-cell during the iteration of rough routing due to the routing blockage. A revised IC design is produced where a revised congestion in an area corresponding to the region is reduced.

Abstract: A technique for routing signal wires in an integrated circuit design includes applying a first rule that attempts to route a signal wire along existing power supply shapes of the integrated circuit design and applying a second rule that provides shield wires along segments of the signal wire that are not routed along one of the existing power supply shapes. The technique also includes routing the signal wire between a first endpoint and a second endpoint while applying the first and second rules to substantially minimize a route cost for the signal wire between the first and second endpoints.

Abstract: A computer system as described herein comprises a first browser instance that displays and navigates hyperlinked browsable content. A global script, in the JavaScript language, is responsible for user interface functions. The global script includes event handlers that respond to identified events. A supervisory application program calls the event handlers in response to the defined events. In addition, the supervisory application program exposes methods that allow the global script to open and close dialogs that are specified as HTML files. Such dialogs are displayed in a second browser instance. The global script uses this capability to create appropriate user interface displays in response to system events.