Abstract: A method and apparatus for processing a semiconductor substrate is described. The apparatus is a process chamber having an optically transparent upper dome and lower dome. Vacuum is maintained in the process chamber during processing. The upper dome is thermally controlled by flowing a thermal control fluid along the upper dome outside the processing region. Thermal lamps are positioned proximate the lower dome, and thermal sensors are disposed among the lamps. The lamps are powered in zones, and a controller adjusts power to the lamp zones based on data received from the thermal sensors.

Abstract: Embodiments of the present invention generally relate to chambers and methods of processing substrates therein. The chambers generally include separate process gas and purge gas regions. The process gas region and purge gas region each have a respective gas inlet and gas outlet. The methods generally include positioning a substrate on a substrate support within the chamber. The plane of the substrate support defines the boundary between a process gas region and purge gas region. Purge gas is introduced into the purge gas region through at least one purge gas inlet, and removed from the purge gas region using at least one purge gas outlet. The process gas is introduced into the process gas region through at least one process gas inlet, and removed from the process gas region through at least one process gas outlet. The process gas is thermally decomposed to deposit a material on the substrate.

Abstract: Embodiments of the invention provide methods for forming high quality, low resistivity Group III-V or Group II-VI compounds. In one embodiment, the method includes growing a compound semiconductor layer having a n-type or p-type dopant over a substrate, the compound semiconductor layer comprising at least a first component and a second component, and the second component has a vapor pressure relatively higher than the first component, forming a supplemental layer consisted essentially of the second component at or near an upper surface of the compound semiconductor layer, and anneal the substrate. A capping layer may be formed on the supplemental layer to help prevent loss of crystallinity of the second component at elevated temperatures. An overpressure of the second component gas may be provided onto an exposed surface of the substrate during annealing to enhance the surface morphology of the compound semiconductor layer.