Abstract: Methods, software tools and systems for analyzing software applications, e.g., Web applications, are described. A software application to be analyzed is transformed into an abstract representation which preserves its information flow properties. The abstract interpretation is evaluated to identify vulnerabilities using, for example, type qualifiers to associate security levels with variables and/or functions in the application being analyzed and typestate checking. Runtime guards are inserted into the application to secure identified vulnerabilities.

Abstract: A data storage system including an array of storage devices and a storage controller is provided. The array of storage devices is configured to store information in the form of a plurality of stripes. The storage controller is configured to write a plurality of code words forming each stripe to the array of storage devices. The plurality of code words includes a plurality of data blocks and at least one redundancy block. K sets of parameters, which are generated based on a generator polynomial, are previously provided. The storage controller includes an encoder for generating the redundancy blocks according to the K sets of parameters. Once up to K storage devices in the array of storage devices are failed, the data storage system recovers the failed storage devices based on the K sets of parameters and the other un-failed blocks, wherein K can be larger than two.

Abstract: A double edge triggered flip-flop is made up of six switches and four inverters. The input data is supplied to one end each of first and second ones of the six switches, the other ends of the first and second switches being separately connected to the inputs of a first and second of the four inverters. The outputs of the first and second inverters are separately connected to the input of the third and fourth inverters via the third and fourth switches. The third inverter serves as a common feedback inverter with the output of the third inverter is connected through the fifth and sixth switches to respective ends of the first and second switches, and the output of the fourth inverter forms the output of the present invention. The first, third, and fifth switches thus form the up-loop for the double edge triggered flip-flop and the second, fourth, and sixth switches forming the down loop, with the two loops sharing the third and fourth inverters.