Patents by Inventor Syed Haider

Syed Haider has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10235633
    Abstract: A method for linking records (related to an entity) from separate databases may include extracting a first record from a first database as a first vector, extracting a second record from a second database as a second vector, generating first and second sub-vectors for the first and second vectors, where each sub-vector includes quality features from the respective vector, pre-processing the first and second sub-vectors using domain knowledge, calculating a distance assessment classifier based on the first and second sub-vectors, and determining whether the distance represented by the distance assessment classifier is greater than a threshold. If the distance is greater than the threshold, the records may be linked; if not, the method extracts additional records and repeats after generating first and second sub-vectors until the distance is greater than the threshold. A system for linking records is also disclosed.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: March 19, 2019
    Assignee: Medidata Solutions, Inc.
    Inventors: Vladimir Tereshkov, Syed Haider, Valerio Aimale, Joshua Hartman, Christopher Bound, Ron Katriel
  • Patent number: 10193826
    Abstract: A shared mesh comprises a mesh station. The mesh station is used to couple to at least a first core component and a second core component. The mesh station includes a logic unit. The mesh station is shared by at least the first core component and the second core component. A memory is coupled to the mesh station.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: January 29, 2019
    Assignee: INTEL CORPORATION
    Inventors: Bahaa Fahim, Yen-Cheng Liu, Chung-Chi Wang, Donald C. Soltis, Jr., Terry C. Huang, Tejpal Singh, Bongjin Jung, Nazar Syed Haider
  • Publication number: 20170218456
    Abstract: Methods, systems, devices and computer implemented methods of prognosing or classifying patients using a biomarker comprising a plurality of subnetwork modules are disclosed. In some embodiments, the method comprises determining an activity of a plurality of genes in a test sample of a patient, wherein the plurality of genes are associated with the plurality of subnetwork modules. An expression profile is constructed using the activity of the plurality of genes. The dysregulation of each of the plurality of subnetwork modules is determined by calculating a score proportional to a degree of dysregulation in each of the plurality of subnetwork modules from the expression profile. The patient is prognosed or classified by inputting each dysregulation score into a model for predicting patient outcomes for patients having a disease, and inputting a clinical indicator of the patient into the model, to obtain a risk associated with the disease.
    Type: Application
    Filed: July 23, 2015
    Publication date: August 3, 2017
    Inventors: John Bartlett, Paul Boutros, Victoria Sabine, Syed Haider, Maud H.W. Starmans, Cindy Qianli Yao, Jianxin Wang
  • Publication number: 20170019350
    Abstract: A shared mesh comprises a mesh station. The mesh station is used to couple to at least a first core component and a second core component. The mesh station includes a logic unit. The mesh station is shared by at least the first core component and the second core component. A memory is coupled to the mesh station.
    Type: Application
    Filed: July 15, 2015
    Publication date: January 19, 2017
    Inventors: Bahaa Fahim, Yen-Cheng Liu, Chung-Chi Wang, Donald C. Soltis, JR., Terry C. Huang, Tejpal Singh, Bongjin Jung, Nazar Syed Haider
  • Publication number: 20160180245
    Abstract: A method for linking records (related to an entity) from separate databases may include extracting a first record from a first database as a first vector, extracting a second record from a second database as a second vector, generating first and second sub-vectors for the first and second vectors, where each sub-vector includes quality features from the respective vector, pre-processing the first and second sub-vectors using domain knowledge, calculating a distance assessment classifier based on the first and second sub-vectors, and determining whether the distance represented by the distance assessment classifier is greater than a threshold. If the distance is greater than the threshold, the records may be linked; if not, the method extracts additional records and repeats after generating first and second sub-vectors until the distance is greater than the threshold. A system for linking records is also disclosed.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: Vladimir Tereshkov, Syed Haider, Valerio Aimale, Joshua Hartman, Christopher Bound, Ron Katriel
  • Patent number: 9288286
    Abstract: A framer interfacing between one or more data converters and a logic device is disclosed. The framer comprises a transport layer and a data link layer, and the framer is configured to frame one or more samples from the data converters to frames according to a serialized interface. In particular, the synthesis of the hardware for the framer is parameterizable, and within the synthesized hardware, one or more software configurations are possible. Instance parameters used in synthesizing the framer may include at least one of: the size of the input bus for providing one or more samples to the transport layer, the total number of bits per converter, and the number of lanes for the link. Furthermore, a transport layer test sequence generator for inserting a test sequence in the transport layer is disclosed.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: March 15, 2016
    Assignee: Analog Devices, Inc.
    Inventors: Kenneth J. Keys, Jr., Syed Haider
  • Publication number: 20150294062
    Abstract: A method for identifying a target molecular profile associated with a target cell population. A set of reference molecular profiles and a set of sample molecular profiles are received. Each sample molecular profile is associated with a sample cell from a sample cell population, which includes a mixture of target cells and reference cells. Each of the sample molecular profiles is indicative of a respective target molecular profile. An average target molecular profile is calculated. A proportion value is calculated for each sample molecular profile. A respective target molecular profile is calculated for each sample molecular profile based on the respective calculated proportion value and a closest similarity to the average target molecular profile.
    Type: Application
    Filed: October 29, 2013
    Publication date: October 15, 2015
    Applicant: ONTARIO INSTITUTE FOR CANCER RESEARCH (OICR)
    Inventors: Gerald Quon, Syed Haider, Ang Cui, Paul C. Boutros, Quaid D. Morris
  • Publication number: 20150016471
    Abstract: A framer interfacing between one or more data converters and a logic device is disclosed. The framer comprises a transport layer and a data link layer, and the framer is configured to frame one or more samples from the data converters to frames according to a serialized interface. In particular, the synthesis of the hardware for the framer is parameterizable, and within the synthesized hardware, one or more software configurations are possible. Instance parameters used in synthesizing the framer may include at least one of: the size of the input bus for providing one or more samples to the transport layer, the total number of bits per converter, and the number of lanes for the link. Furthermore, a transport layer test sequence generator for inserting a test sequence in the transport layer is disclosed.
    Type: Application
    Filed: July 9, 2013
    Publication date: January 15, 2015
    Applicant: Analog Devices, Inc.
    Inventors: Kenneth J. Keyes, JR., Syed Haider
  • Patent number: 7548756
    Abstract: A system and method for exchanging messages between a mobile device and a plurality of IM services. The system includes an SMS-based MIM client that runs on a mobile device and provides a plurality of user interfaces for a plurality of respective IM services. A user of the mobile device can log in to at least one of the IM services using the MIM client, and the mobile phone user can use the MIM client to exchange text messages with users logged into the at least one chosen IM service.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: June 16, 2009
    Assignee: Cellco Partnership
    Inventors: Adrian Velthuis, Syed Haider, Xuming Chen, Jerry Kupsh, Biren Patel
  • Patent number: 7441132
    Abstract: A circuit that enables a safe power-on sequencing is described. The circuit enables a processor to be powered by an internal or external voltage source. The circuit detects for the presence of an external voltage regulator. If an external voltage generator is not providing a valid voltage source to the processor, the circuit enables an internal voltage regulator to provide a stable voltage source.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: October 21, 2008
    Assignee: Intel Corporation
    Inventor: Nazar Syed Haider
  • Patent number: 7353035
    Abstract: A method and system for selectively displaying an origination address of a mobile message, e.g., an SMS message, includes the steps of: (1) determining that a mobile message includes an origination address that should not be displayed on a recipient device; and (2) including data in the mobile message to cause the origination address not to be displayed on the recipient device. The origination address which is selectively prevented from being displayed is one which is not provided by the prime, i.e., true originating sender of the mobile message. A call-back number may be similarly selectively displayed. The system and method provide a way to address recipient confusion that may arise from the display of origination information that is meaningless or otherwise incomprehensible to message recipients.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: April 1, 2008
    Assignee: Cellco Partnership
    Inventors: Jerry Kupsh, Syed Haider
  • Publication number: 20060271696
    Abstract: A system and method for exchanging messages between a mobile device and a plurality of IM services. The system includes an SMS-based MIM client that runs on a mobile device and provides a plurality of user interfaces for a plurality of respective IM services. A user of the mobile device can log in to at least one of the IM services using the MIM client, and the mobile phone user can use the MIM client to exchange text messages with users logged into the at least one chosen IM service.
    Type: Application
    Filed: August 8, 2006
    Publication date: November 30, 2006
    Applicant: CELLCO PARTNERSHIP D/B/A VERIZON WIRELESS
    Inventors: Xuming Chen, Syed Haider, Jerry Kupsh, Biren Patel, Adrian Velthuis
  • Patent number: 7120455
    Abstract: A system and method for exchanging messages between a mobile device and a plurality of IM services. The system includes an SMS-based MIM client that runs on a mobile device and provides a plurality of user interfaces for a plurality of respective IM services. A user of the mobile device can log in to at least one of the IM services using the MIM client, and the mobile phone user can use the MIM client to exchange text messages with users logged into the at least one chosen IM service.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: October 10, 2006
    Assignee: Cellco Partnership
    Inventors: Xuming Chen, Syed Haider, Jerry Kupsh, Biren Patel, Adrian Velthuis
  • Patent number: 7013396
    Abstract: A circuit that enables a safe power-on sequencing is described. The circuit enables a processor to be powered by an internal or external voltage source. The circuit detects for the presence of an external voltage regulator. If an external voltage generator is not providing a valid voltage source to the processor, the circuit enables an internal voltage regulator to provide a stable voltage source.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: March 14, 2006
    Assignee: Intel Corporation
    Inventor: Nazar Syed Haider
  • Patent number: 6933760
    Abstract: A voltage reference generator for a hysteresis circuit, comprising a first originator circuit to generate a first reference voltage; a second originator circuit to generate a second reference voltage; and a selector circuit, coupled to the first and second originator circuits, to select one of the first and second reference voltages to be an output reference voltage based upon an input signal to the hysteresis circuit undertaking a low-to-high or a high-to-low signal transition respectively. The first originator circuit includes a first plurality of channel devices selected from either p-channel devices or n-channel devices and the second originator circuit includes a second plurality of channel devices selected from the other one of the p-channel devices and the n-channel devices.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: August 23, 2005
    Assignee: Intel Corporation
    Inventors: Nazar Syed Haider, Sooseok Oh
  • Publication number: 20040124909
    Abstract: Arrangements (methods, apparatus, etc.) providing safe component biasing.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Nazar Syed Haider, Ahmad Siddiqui, Sooseok Oh
  • Publication number: 20040064747
    Abstract: A circuit that enables a safe power-on sequencing is described. The circuit enables a processor to be powered by an internal or external voltage source. The circuit detects for the presence of an external voltage regulator. If an external voltage generator is not providing a valid voltage source to the processor, the circuit enables an internal voltage regulator to provide a stable voltage source.
    Type: Application
    Filed: September 26, 2002
    Publication date: April 1, 2004
    Inventor: Nazar Syed Haider
  • Patent number: 6108204
    Abstract: A cooling system for a multi processor system mounted in a rack that has a top, a bottom, sides and a plurality of card cages. Each of the card cages has card guides for receiving mother boards such that the mother boards are positioned vertically within the rack. A CPU is mounted on a mother board and a heat sink is mounted on top of the CPU and fastened to the mother board. The heat sink includes a plurality of air passages and is positioned with respect to the mother board such that when the mother board is mounted in the rack, the air passages are vertical. A blower is integrated into the rack such that air flows vertically through the rack. Also a heat sink for use on a baby AT mother board on which a CPU socket is mounted and into which a CPU is plugged.
    Type: Grant
    Filed: January 8, 1996
    Date of Patent: August 22, 2000
    Assignee: Intel Corporation
    Inventors: Daniel Brotherton, Fred J. Shipley, Syed Haider
  • Patent number: 5626716
    Abstract: A dry etching process for use in the manufacture of silicon integrated circuit devices uses a mixture of about eight parts neon to one part CHF.sub.3 (Freon 23) to form the etching plasma. The process etches doped oxides of silicon, such as BPSG and BPTEOS, in preference to undoped oxides of silicon, silicon nitride, silicides and silicon.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: May 6, 1997
    Assignee: Lam Research Corporation
    Inventors: William F. Bosch, Helen H. Zhu, Syed A. Haider
  • Patent number: 5611888
    Abstract: A dry etching process for use in the manufacture of silicon integrated circuit devices uses a mixture of about eight parts neon to one part CHF.sub.3 (Freon 23) to form the etching plasma. The process etches doped oxides of silicon, such as BPSG and BPTEOS, in preference to undoped oxides of silicon, silicon nitride, silicides and silicon.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: March 18, 1997
    Assignee: Lam Research Corporation
    Inventors: William F. Bosch, Helen Zhu, Syed A. Haider