Abstract: A liquid crystal display comprises a data driver, a scanning driver, and a pixel matrix. The pixel matrix is driven by the data driver and scanning driver, and the pixel matrix comprises a plurality of first pixels positioned in non-polarity reversed rows and a plurality of second pixels positioned in polarity reversed rows. The data driver provides a first gray level voltage signal for the first pixels, and provides a second gray level voltage signal for the second pixels. The second gray level voltage signal includes a first sub-gray level voltage and a second sub-gray level voltage which are sequentially outputted to the second pixels. An absolute value of the first sub-gray level voltage is greater than that of the second sub-gray level voltage, and the absolute value of the second sub-gray level voltage is the same with that of the first gray level voltage signal.

Abstract: An exemplary gamma voltage output circuit (3) has an internal resistor string (31), which has a plurality of resistors and a plurality of nodes; at least one external resistor string (32, 33, 34), which has a plurality of resistors and a plurality of nodes; a plurality of switching circuit (35), each switching circuit having at least one input end (353, 354, 355) and at least one output end (356). The internal and the at least one external resistor strings connect in series between the power source AVDD and ground, respectively. Each node outputs a gamma voltage. The nodes of internal and the at least one external resistor strings respectively are connected to the output end and the input end, the resistors of the internal resistor string parallel connecting to corresponding resistors of the at least one external resistor string through the corresponding switching circuit.

Abstract: A method for improving motion blur and contour shadow of a display displaying images having a number of frames includes transforming a second average gray scale into a third average gray scale when a first average gray scale for displaying a first frame is unequal to the second average gray scale for displaying a second frame. A luminance corresponding to the second frame is generated according to the third average gray scale and at least one luminance query table. The third average gray scale is greater than the first average gray scale and the second average gray scale or less than the first average gray scale and the second average gray scale.

Abstract: A gate line driving module used on a liquid crystal display uses clock signal sources in replacement of a high level gate power source, such that the phenomenon of device characteristic drift occurring in the foregoing related art is avoided. The gate line driving module includes a plurality of odd-pixel gate line driving circuits, a plurality of even-pixel gate line driving circuits, and an auxiliary gate line driving circuit. A pair of neighboring odd-pixel gate line driving circuit and even-pixel gate line driving circuit exchange output signals thereof with each other in a forward or feedback manner for ensuring that each the odd-pixel gate line driving circuit and each the even-pixel gate line driving circuit are driven once. The auxiliary gate line driving circuit is used for ensuring that signal iteration of the gate line driving module is under normal operation.

Abstract: An exemplary shift register (20) includes a plurality of shift register units (200) connected one by one. Each of the shift register units includes a clock signal input terminal (TS), a reverse clock signal input terminal (TSB), a high level signal input terminal (VH), a low level signal input terminal (VL), an output terminal (VOUT), a reverse output terminal (VOUTB), a first input terminal (VIN1), a second input terminal (VIN2), a common node (P), a first switch circuit (31) providing a high level signal to the common node, a second switch circuit (32) providing a low level signal to the common node, a third switch circuit (33) providing a clock signal to the output terminal, a fourth switch circuit (34) providing a low level signal to the output terminal, and an inverter (36) connected between the output terminal and the reverse output terminal.

Abstract: An exemplary driving circuit (250) of an LCD (200) includes: gate lines (210) that are parallel to each other and that each extend along a first direction; data lines (202) that are parallel to each other and that each extend along a second direction substantially orthogonal to the first direction; a gate driving circuit (210) connected to the gate lines; a data driving circuit (220) connected to the data lines; and a pre-charging voltage circuit (240). The pre-charging voltage circuit is configured to provide a pre-charging voltage to each of the data lines before the gate driving circuit scans the gate lines.

Abstract: A shift register of the present disclosure switches on and off various transistors in order to reduce power consumption. A high input voltage source and a low input voltage source of the shift register are spaced apart from each other so as to reduce signal noise distortion between the voltage sources. The shift register may be employed in a liquid crystal display (LCD).

Abstract: An exemplary liquid crystal display device (1) includes a first substrate (3), a second substrate (2) facing the first substrate, and a liquid crystal layer (4) sandwiched between the first substrate and the second substrate. The first substrate includes a plurality of scan lines (11); a plurality of first and second parallel data lines (12, 22) orthogonal to the scan lines; a plurality of first and second thin film transistors (14, 24), positioned near a crossing of a corresponding scan line and a corresponding first data line, respectively; a plurality of first and second pixel electrodes (15, 25) electrically coupled to the first and second thin film transistors, respectively; a plurality of first and second static display units (19, 29) for providing voltage to the first and second pixel electrodes in a static display mode.

Abstract: An exemplary liquid crystal display (LCD) (20) includes an LCD panel (24), a timing control circuit (21), a plurality of gate drivers (23) connected to the LCD panel, and a plurality of data drivers (22) connected to the LCD panel. The timing control circuit includes a plurality of reduced swing differential signaling (RSDS) output terminals. Each data driver is electrically connected to a respective RSDS output terminal of the timing control circuit via an independent conducting line.

Abstract: An exemplary liquid crystal display (600) includes a liquid crystal panel, a scanning driving circuit (61), a compensation circuit (68), a control circuit (67), and a signal line driving circuit (62). The liquid crystal panel includes a first substrate, a second substrate opposite to the first substrate, and a liquid crystal layer sandwiched between the first and second substrates. The first substrate includes a plurality of scanning lines (63) that are parallel to each other and that each extend along a first direction, and a plurality of signal lines (64) that are parallel to each other and that each extend along a second direction orthogonal to the first direction. The scanning driving circuit is connected to the scanning lines, and continuously scans the same scanning lines twice in a frame time. The compensation circuit generates first signals. The control circuit generates gradation signals corresponding to the second frame image data.

Abstract: A liquid crystal display (LCD) device includes an LCD panel, and a common voltage generating circuit configured for providing common voltages to the LCD panel. The common voltage generating circuit includes a microprocessor, a timer, a voltage adjustment circuit, and a look up table. The microprocessor is electrically connected to the timer, the look up table, and the voltage adjustment circuit. The timer is configured for recording a continuous operated time of the LCD panel. The look up table is configured for storing optimal common voltages corresponding to each continuous operated time. The microprocessor is configured for reading the optimal common voltage at set intervals corresponding to the continuous operated time, and controlling the voltage adjustment circuit to provide the corresponding optimal common voltage to the LCD panel.

Abstract: A driving method for an active matrix liquid crystal display panel includes the following steps. First, a frame period is divided into a display period (t1) and a black insertion period (tr). A gray-scale voltage is generated according to a desired corresponding light transmittance of each pixel of the liquid crystal display panel; and during the display period, the gray-scale voltage is supplied to a corresponding pixel electrode of the liquid crystal display panel. Then during the black insertion period, a restoring voltage Vh is supplied to the pixel electrode, so that the pixel is returned to an initial black state. Accordingly, the quality of motion pictures of the liquid crystal display panel is good.

Abstract: An exemplary shift register includes a plurality of shift register units, each of which includes an output circuit, an input circuit, and a logic circuit. The output circuit includes a clock transistor, a voltage stabilizing transistor, and an input circuit for receiving signals output by a previous shift register unit. The logic circuit receives signals output by the input circuit. When the input circuit outputs signals to switch on the clock transistor, the logic circuit outputs a low level voltage signal to shut off the voltage stabilizing transistor. Thus, the output circuit outputs signals via the clock circuit. On the other hand, when the input circuit outputs signals to shut off the clock transistor, the logic circuit outputs a high level voltage signal to turn on the voltage stabilizing transistor, so as to maintain the output circuit to output low level voltage signal.

Abstract: The present invention relates to a shift register and a liquid crystal display using the same. The liquid crystal display includes a liquid crystal panel, a data driving circuit and a scanning driving circuit. The data driving circuit and the scanning driving circuit each include a shift register. The shift register includes a plurality of shift register units. Two adjacent shift register units respectively receive two inverse clock signals and a VGL signal. Each shift register unit includes a signal output circuit, a signal input circuit, a first logic converting circuit, and a second logic converting circuit. The present shift register and a liquid crystal display have simple structure.

Abstract: A shift register of the present disclosure comprises a plurality of shift register units using alternating clock signals to shift signals. The shift register outputs signals having substantially no overlap with adjacent signals. The shift register may be employed in a liquid crystal display.

Abstract: A shift register of the present disclosure switches on and off various transistors in order to reduce power consumption. A high input voltage source and a low input voltage source of the shift register are spaced apart from each other so as to reduce signal noise distortion between the voltage sources. The shift register may be employed in a liquid crystal display (LCD).

Abstract: An exemplary LCD includes a frame memory configured for receiving a plurality of first gradations of current frame and outputting a plurality of second gradations of preceding frame pre-stored therein; a comparator configured for receiving, comparing the first gradations with the second gradation to generate a comparison result; a luminance detector configured for detecting a luminance degree of each of pixel according to the gradations of current frame; a calculator configured for calculating a complication degree of a picture to be displayed in current frame; and a gradation processor configured for receiving the first gradations of current frame to be displayed on the LCD panel, generating a plurality of pairs of compensating gradations according to the gradation of each pixel, and selecting one pair of the compensating gradations to be outputted to the LCD panel according to a received comparison result, a received luminance degree, and a received complication degree.

Abstract: An exemplary shift register includes plural shift register units (S1˜Sn). All the shift register units receive either a first clock signal or a second clock signal, and the shift register units output a plurality of shift register signals in sequence. An output of a previous shift register unit is an input of the next adjacent shift register unit.

Abstract: An exemplary liquid crystal display (300) includes a liquid crystal panel (301), a data circuit (303), and a black insertion controller (305). The liquid crystal panel includes a plurality of pixels (330). The black insertion controller receives a display signal of the pixel, and generates a black insertion control signal according to an address of the pixel, and the data circuit drives the pixel to display one of a black image unit and a normal image unit according to the black insertion control signal in a first sub-frame period of a frame period. The displayed black image unit of the pixel or the displayed normal image unit is converted into a normal image unit or a black image unit in a second sub-frame period of the frame period. A method for driving the liquid crystal display is also provided.

Abstract: An exemplary shift register (20) includes a plurality of shift register units (200) connected one by one. Each of the shift register units includes a clock signal input terminal (TS), a high level signal input terminal (VH), a low level signal input terminal (VL), an input terminal (VIN), a first output terminal (VOUT1), a second output terminal (VOUT2), a first common node (P1), a second common node (P2), a first switch circuit (31), a second switch circuit (32), a third switch circuit (33), a fourth switch circuit (34), a fifth switch circuit (35), a six switch circuit (36), a nor gate, an inverter, and an and gate.