Patents by Inventor Ta-Cheng Hsu

Ta-Cheng Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960201
    Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Cheng Hsu, Chun-Fu Yang, Ta-Cheng Lien, Hsin-Chang Lee
  • Publication number: 20240085781
    Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chang LEE, Pei-Cheng HSU, Hao-Ping CHENG, Ta-Cheng LIEN
  • Patent number: 11929730
    Abstract: An acoustic wave element includes: a substrate; a bonding structure on the substrate; a support layer on the bonding structure; a first electrode including a lower surface on the support layer; a cavity positioned between the support layer and the first electrode and exposing a lower surface of the first electrode; a piezoelectric layer on the first electrode; and a second electrode on the piezoelectric layer, wherein at least one of the first electrode and the second electrode includes a first layer and a second layer that the first layer has a first acoustic impedance and a first electrical impedance, the second layer has a second acoustic impedance and a second electrical impedance, wherein the first acoustic impedance is higher than the second acoustic impedance, and the second electrical impedance is lower than the first electrical impedance.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: March 12, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Ta-Cheng Hsu, Wei-Shou Chen, Chun-Yi Lin, Chung-Jen Chung, Wei-Tsuen Ye, Wei-Ching Guo
  • Publication number: 20240077804
    Abstract: A method includes forming a test pattern and a reference pattern in an absorption layer of a photomask structure. The test pattern has a first trench and a second trench, the reference pattern has a third trench and a fourth trench, the test pattern and the reference pattern have substantially the same dimension in a top view, and the second trench is deeper than the first trench, the third trench, and the fourth trench. The method further includes emitting a light beam to the test pattern to obtain a first interference pattern reflected from the test pattern, emitting the light beam to the reference pattern to obtain a second interference pattern reflected from the reference pattern; and comparing the first interference pattern with the second interference pattern to obtain a measured complex refractive index of the absorption layer.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Hsun LIN, Chien-Cheng CHEN, Shih Ju HUANG, Pei-Cheng HSU, Ta-Cheng LIEN, Hsin-Chang LEE
  • Publication number: 20220393659
    Abstract: An acoustic wave device includes: a substrate; a first electrode on the substrate; a piezoelectric layer on the first electrode; and a second electrode on the piezoelectric layer. A bonding interface is located between the substrate and the first electrode. The full width at half maximum (FWHM) in the X-ray diffraction pattern of the crystal plane <002> of the piezoelectric layer is between 10 arc-sec and 3600 arc-sec.
    Type: Application
    Filed: June 2, 2022
    Publication date: December 8, 2022
    Inventors: TA-CHENG HSU, WEI-SHOU CHEN, CHUNG-JEN CHUNG, CHENG-TSE CHOU, TIEN-YU WANG, CHUN-YI LIN, YU-JIUN SHEN, WEI-CHING GUO
  • Patent number: 11515307
    Abstract: A method of making a semiconductor device includes: providing a substrate; forming an insulating layer on the substrate; forming a first trench in the insulating layer; forming a first semiconductor layer in the first trench; and removing a portion of the insulating layer to expose the first semiconductor layer.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: November 29, 2022
    Assignees: National Applied Research Laboratories, EPISTAR Corporation
    Inventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
  • Publication number: 20210351761
    Abstract: A method for forming an acoustic wave device, including steps of: forming an acoustic wave sensing part and an acoustic wave reflecting part, wherein the step of forming the acoustic wave sensing part includes: providing a first substrate, forming a sensing layer on the first substrate, forming a bottom electrode on a side of the sensing layer, and forming a filling layer on the sensing layer and the bottom electrode; and wherein the step of forming the acoustic wave reflecting part includes: providing a second substrate, forming a reflecting element on the second substrate, and forming a cover layer on the reflecting element; joining the acoustic wave sensing part and the acoustic wave reflecting part; removing the first substrate; and forming a top electrode on another side of the sensing layer, wherein the bottom electrode, the top electrode and the reflecting element are arranged correspondingly to each other.
    Type: Application
    Filed: May 5, 2021
    Publication date: November 11, 2021
    Inventors: Wei-Tsuen YE, Ta-Cheng HSU, Wei-Shou CHEN, Chung-Jen CHUNG
  • Publication number: 20210281237
    Abstract: An acoustic wave device, includes piezoelectric layer having an upper piezoelectric surface and a lower piezoelectric surface; an upper electrode formed on the upper piezoelectric surface; a lower electrode; a support layer including a non-monocrystalline insulating material; and a lower cover, wherein the lower electrode and the support layer formed between the lower cover and the lower piezoelectric surface.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 9, 2021
    Inventors: TA-CHENG HSU, WEI-SHOU CHEN, CHUNG-JEN CHUNG, CHIA-MIN CHANG
  • Publication number: 20210257986
    Abstract: An acoustic wave element includes: a substrate; a bonding structure on the substrate; a support layer on the bonding structure; a first electrode including a lower surface on the support layer; a cavity positioned between the support layer and the first electrode and exposing a lower surface of the first electrode; a piezoelectric layer on the first electrode; and a second electrode on the piezoelectric layer, wherein at least one of the first electrode and the second electrode includes a first layer and a second layer that the first layer has a first acoustic impedance and a first electrical impedance, the second layer has a second acoustic impedance and a second electrical impedance, wherein the first acoustic impedance is higher than the second acoustic impedance, and the second electrical impedance is lower than the first electrical impedance.
    Type: Application
    Filed: February 10, 2021
    Publication date: August 19, 2021
    Inventors: Ta-Cheng HSU, Wei-Shou CHEN, Chun-Yi LIN, Chung-Jen CHUNG, Wei-Tsuen YE, Wei-Ching GUO
  • Patent number: 10886433
    Abstract: A light-emitting device comprises a textured substrate comprising a plurality of textured structures, wherein the textured structures and the textured substrate are both composed of sapphire; and a light-emitting stack overlaying the textured substrate, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, wherein each of the plurality of textured structures comprises a top portion having a first top-view shape, and a bottom portion parallel to the top portion and having a second top-view shape, wherein the first top-view shape comprises a circle or an ellipse, the first top-view shape comprises a first periphery and the second top-view shape comprises a second periphery, the first periphery is enclosed by the second periphery, and various distances are between each of the first periphery and the second periphery.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: January 5, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Ta-Cheng Hsu, Ching-Shian Yeh, Chao-Shun Huang, Ying-Yong Su, Ya-Lan Yang, Ya-Ju Lee
  • Publication number: 20200303377
    Abstract: A method of making a semiconductor device includes: providing a substrate; forming an insulating layer on the substrate; forming a first trench in the insulating layer; forming a first semiconductor layer in the first trench; and removing a portion of the insulating layer to expose the first semiconductor layer.
    Type: Application
    Filed: June 4, 2020
    Publication date: September 24, 2020
    Inventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
  • Patent number: 10727231
    Abstract: A heterogeneously integrated semiconductor device includes a substrate comprising a first material; a recess formed within the substrate and having a bottom portion with a first width, a top portion with a second width and a middle portion with a third width larger than the first width and the second width; and a first semiconductor layer filled in the bottom portion and including a second material different from the first material.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: July 28, 2020
    Assignees: National Applied Research Laboratories, EPISTAR Corporation
    Inventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
  • Publication number: 20190319170
    Abstract: A light-emitting device comprises a textured substrate comprising a plurality of textured structures, wherein the textured structures and the textured substrate are both composed of sapphire; and a light-emitting stack overlaying the textured substrate, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, wherein each of the plurality of textured structures comprises a top portion having a first top-view shape, and a bottom portion parallel to the top portion and having a second top-view shape, wherein the first top-view shape comprises a circle or an ellipse, the first top-view shape comprises a first periphery and the second top-view shape comprises a second periphery, the first periphery is enclosed by the second periphery, and various distances are between each of the first periphery and the second periphery.
    Type: Application
    Filed: June 26, 2019
    Publication date: October 17, 2019
    Inventors: Ta-Cheng HSU, Ching-Shian YEH, Chao-Shun HUANG, Ying-Yong SU, Ya-Lan YANG, Ya-Ju LEE
  • Patent number: 10374125
    Abstract: A light-emitting device comprises a textured substrate comprising a plurality of textured structures, wherein the textured structures and the textured substrate are both composed of sapphire; and a light-emitting stack overlaying the textured substrate, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, wherein each of the plurality of textured structures comprises a top portion having a first top-view shape, and a bottom portion parallel to the top portion and having a second top-view shape, wherein the first top-view shape comprises a circle or an ellipse, the first top-view shape comprises a first periphery and the second top-view shape comprises a second periphery, the first periphery is enclosed by the second periphery, and various distances are between each of the first periphery and the second periphery.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: August 6, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Ta-Cheng Hsu, Ching-Shian Yeh, Chao-Shun Huang, Ying-Yong Su, Ya-Lan Yang, Ya-Ju Lee
  • Publication number: 20190067518
    Abstract: A light-emitting device comprises a textured substrate comprising a plurality of textured structures, wherein the textured structures and the textured substrate are both composed of sapphire; and a light-emitting stack overlaying the textured substrate, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, wherein each of the plurality of textured structures comprises a top portion having a first top-view shape, and a bottom portion parallel to the top portion and having a second top-view shape, wherein the first top-view shape comprises a circle or an ellipse, the first top-view shape comprises a first periphery and the second top-view shape comprises a second periphery, the first periphery is enclosed by the second periphery, and various distances are between each of the first periphery and the second periphery.
    Type: Application
    Filed: July 30, 2018
    Publication date: February 28, 2019
    Inventors: Ta-Cheng HSU, Ching-Shian YEH, Chao-Shun HUANG, Ying-Yong SU, Ya-Lan YANG, Ya-Ju LEE
  • Publication number: 20190043862
    Abstract: A heterogeneously integrated semiconductor device includes a substrate comprising a first material; a recess formed within the substrate and having a bottom portion with a first width, a top portion with a second width and a middle portion with a third width larger than the first width and the second width; and a first semiconductor layer filled in the bottom portion and including a second material different from the first material.
    Type: Application
    Filed: October 12, 2018
    Publication date: February 7, 2019
    Inventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
  • Patent number: 10134735
    Abstract: A heterogeneously integrated semiconductor devices includes a base substrate; a Ge-containing film formed on the base substrate; a PMOSFET transistor having a first fin formed on the Ge-containing film; and a NMOSFET transistor having a second fin formed on the Ge-containing film; wherein the PMOSFET transistor and the NMOSFET transistor compose a CMOS transistor, and the first fin comprises Ge-containing material and the second fin comprises a Group III-V compound.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: November 20, 2018
    Assignees: National Applied Research Laboratories, EPISTAR Corporation
    Inventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
  • Patent number: 10038116
    Abstract: A light-emitting device comprises a textured substrate comprising a plurality of textured structures, wherein the textured structures and the textured substrate are both composed of sapphire; and a light-emitting stack overlaying the textured substrate, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, wherein one of the plurality of textured structures comprises a top portion and a bottom portion, wherein a first distance between a first projection of the top portion on the bottom portion and the bottom portion at one side is different from a second distance between a second projection of the top portion on the bottom portion and the bottom portion at another side.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: July 31, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Ta-Cheng Hsu, Ching-Shian Yeh, Chao-Shun Huang, Ying-Yong Su, Ya-Lan Yang, Ya-Ju Lee
  • Publication number: 20170373064
    Abstract: A heterogeneously integrated semiconductor devices includes a base substrate; a Ge-containing film formed on the base substrate; a PMOSFET transistor having a first fin formed on the Ge-containing film; and a NMOSFET transistor having a second fin formed on the Ge-containing film; wherein the PMOSFET transistor and the NMOSFET transistor compose a CMOS transistor, and the first fin comprises Ge-containing material and the second fin comprises a Group III-V compound.
    Type: Application
    Filed: June 26, 2017
    Publication date: December 28, 2017
    Inventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
  • Patent number: 9780259
    Abstract: A light-emitting device comprises a textured substrate comprising a plurality of textured structures, wherein the textured structures and the textured substrate are both composed of sapphire; and a light-emitting stack overlaying the textured substrate, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, wherein each of the plurality of textured structures comprises a top portion having a first top-view shape, and a bottom portion parallel to the top portion and having a second top-view shape, wherein the first top-view shape comprises a circle or an ellipse, the first top-view shape comprises a first periphery and the second top-view shape comprises a second periphery, the first periphery is enclosed by the second periphery, and various distances are between each of the first periphery and the second periphery.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: October 3, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Ta-Cheng Hsu, Ya-Lan Yang, Ying-Yong Su, Ching-Shian Yeh, Chao-Shun Huang, Ya-Ju Lee