Patents by Inventor Ta-Jen Yu

Ta-Jen Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200152479
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Applicant: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Publication number: 20200091070
    Abstract: A semiconductor package structure including a semiconductor die having a first surface, a second surface opposite the first surface, and a third surface adjoined between the first surface and the second surface. A first protective insulating layer covers the first and third surfaces of the semiconductor die. A redistribution layer (RDL) structure is electrically coupled to the semiconductor die and surrounded by the first protective insulating layer on the first surface of the semiconductor die. A first passivation layer covers the first protective insulating layer and the RDL structure. At least one conductive structure passes through the first passivation layer and is electrically coupled to the RDL structure. A method of forming the semiconductor package is also provided.
    Type: Application
    Filed: June 3, 2019
    Publication date: March 19, 2020
    Applicant: MediaTek Inc.
    Inventors: Yen-Yao Chi, Nai-Wei Liu, Ta-Jen Yu, Tzu-Hung Lin, Wen-Sung Hsu
  • Patent number: 10580747
    Abstract: In one configuration, a semiconductor package includes a conductive trace embedded in a base and a semiconductor device mounted on the conductive trace via a conductive structure, wherein the conductive structure is a bump structure and the width of the bump structure is bigger than the width of the conductive trace. In another configuration, a method for fabricating a semiconductor package includes providing a base, forming at least one conductive trace on the base, forming an additional insulation material on the base, and defining patterns upon the additional insulation material, wherein the pattern is formed on at least one conductive trace, wherein the conductive structure is a bump structure and the width of the bump structure is bigger than the width of the conductive trace.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: March 3, 2020
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, Wen-Sung Hsu, Ta-Jen Yu, Andrew C. Chang
  • Patent number: 10573615
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: February 25, 2020
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, Wen-Sung Hsu, Ta-Jen Yu, Andrew C. Chang
  • Patent number: 10573616
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: February 25, 2020
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, Wen-Sung Hsu, Ta-Jen Yu, Andrew C. Chang
  • Patent number: 10573536
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: February 25, 2020
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Patent number: 10553526
    Abstract: A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate having a die attach surface. A conductive trace is disposed on the substrate, wherein the conductive trace is elongated and carries a signal or a ground across at least a portion of the substrate. A die is mounted on the die attach surface of the substrate via a conductive pillar bump, the conductive pillar bump being rounded and elongated such that the conductive pillar bump extends along a length of the conductive trace and contacts the conductive trace at an end or at an intermediate portion thereof. The die further includes a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, and wherein the first edge is not adjacent to the second edge.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: February 4, 2020
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Tzu-Hung Lin, Ta-Jen Yu
  • Patent number: 10340198
    Abstract: The invention provides a semiconductor package and a method for fabricating the same. The semiconductor package includes a redistribution layer (RDL) structure, a semiconductor die, a molding compound and a supporter. The RDL structure has a first surface and a second surface opposite to the first surface. The semiconductor die is disposed on the first surface of the RDL structure and electrically coupled to the RDL structure. The molding compound is positioned overlying the semiconductor die and the first surface of the RDL structure. The supporter is positioned beside the semiconductor die and in contact with the first surface of the RDL structure.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: July 2, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ta-Jen Yu, Wen-Sung Hsu
  • Patent number: 10312210
    Abstract: The invention provides a semiconductor package. The semiconductor package includes a base having a device-attach surface and a solder-ball attach surface opposite to the device-attach surface. A conductive via is disposed passing through the base. The conductive via includes a first terminal surface aligned to the device-attach surface of the base. A semiconductor die is mounted on the base by a conductive structure. The conductive structure is in contact with the first terminal surface of the conductive via.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: June 4, 2019
    Assignee: MediaTek Inc.
    Inventors: Ching-Liou Huang, Ta-Jen Yu
  • Publication number: 20190164780
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.
    Type: Application
    Filed: January 31, 2019
    Publication date: May 30, 2019
    Applicant: Media Tek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Patent number: 10236242
    Abstract: A package substrate is provided. The package substrate includes a dielectric layer and a passive component embedded in the dielectric layer and contacting the dielectric layer. A circuit layer is embedded in the dielectric layer and has a first surface aligned with a second surface of the dielectric layer. A conductive structure is embedded in the dielectric layer and electrically connected to the passive component and the circuit layer. A chip package is also provided.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: March 19, 2019
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Patent number: 10236187
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: March 19, 2019
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Patent number: 10217716
    Abstract: A method for fabricating a semiconductor is disclosed. A carrier substrate is provided. A redistribution layer (RDL) structure is formed on the carrier substrate. The RDL structure comprises at least a bump pad. A semiconductor die is mounted on the RDL structure. A molding compound is formed on the semiconductor die and the RDL structure. The carrier substrate is removed to reveal a plurality of solder ball pads of the RDL structure. A plurality of conductive structures are formed on the solder ball pads.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: February 26, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ta-Jen Yu, Yu-Sheng Hung, Wen-Sung Hsu
  • Patent number: 10115604
    Abstract: A method for fabricating a base for a semiconductor package is provided. The method operates by providing a carrier with conductive seed layers on the top surface and the bottom surface of the carrier, forming radio-frequency (RF) devices respectively on the conductive seed layers, laminating a first base material layer and a second base material layer respectively on the conductive seed layers, covering the RF devices, and separating the first base material layer the second base material layer, which contain the RF devices thereon, from the carrier to form a first base and a second base.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: October 30, 2018
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Patent number: 10074581
    Abstract: A chip package includes a patterned conducting plate having a plurality of conducting sections electrically separated from each other, a plurality of conducting pads disposed on an upper surface of the patterned conducting plate, wherein a recess extending from a surface of one of the conducting pads towards an inner portion of the corresponding one of the conducting pads, a chip disposed on the conducting pads, a plurality of conducting bumps disposed on a lower surface of the patterned conducting plate, wherein each of the conducting bumps is electrically connected to a corresponding one of the conducting sections of the patterned conducting plate, and an insulating support layer partially surrounding the conducting bumps.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: September 11, 2018
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Ming-Chieh Lin, Ta-Jen Yu
  • Publication number: 20180233476
    Abstract: The invention provides a semiconductor package. The semiconductor package includes a base having a device-attach surface and a solder-ball attach surface opposite to the device-attach surface. A conductive via is disposed passing through the base. The conductive via includes a first terminal surface aligned to the device-attach surface of the base. A semiconductor die is mounted on the base by a conductive structure. The conductive structure is in contact with the first terminal surface of the conductive via.
    Type: Application
    Filed: April 10, 2018
    Publication date: August 16, 2018
    Applicant: MediaTek Inc.
    Inventors: Ching-Liou Huang, Ta-Jen Yu
  • Publication number: 20180233425
    Abstract: The invention provides a semiconductor package and a method for fabricating the same. The semiconductor package includes a redistribution layer (RDL) structure, a semiconductor die, a molding compound and a supporter. The RDL structure has a first surface and a second surface opposite to the first surface. The semiconductor die is disposed on the first surface of the RDL structure and electrically coupled to the RDL structure. The molding compound is positioned overlying the semiconductor die and the first surface of the RDL structure. The supporter is positioned beside the semiconductor die and in contact with the first surface of the RDL structure.
    Type: Application
    Filed: January 26, 2018
    Publication date: August 16, 2018
    Inventors: Ta-Jen YU, Wen-Sung HSU
  • Publication number: 20180233474
    Abstract: The invention provides a semiconductor package. The semiconductor package includes a semiconductor die and a conductive pillar bump structure and a conductive plug. The semiconductor die has a die pad thereon. The conductive pillar bump structure is positioned overlying the die pad. The conductive pillar bump structure includes an under bump metallurgy (UBM) stack having a first diameter and a conductive plug on the UBM stack. The conductive plug has a second diameter that is different than the first diameter.
    Type: Application
    Filed: January 26, 2018
    Publication date: August 16, 2018
    Inventors: Ta-Jen YU, Chi-Yuan CHEN, Wen-Sung HSU
  • Publication number: 20180166297
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.
    Type: Application
    Filed: February 9, 2018
    Publication date: June 14, 2018
    Applicant: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Patent number: 9972593
    Abstract: The invention provides a semiconductor package. The semiconductor package includes a base having a device-attach surface and a solder-ball attach surface opposite to the device-attach surface. A conductive via is disposed passing through the base. The conductive via includes a first terminal surface aligned to the device-attach surface of the base. A semiconductor die is mounted on the base by a conductive structure. The conductive structure is in contact with the first terminal surface of the conductive via.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: May 15, 2018
    Assignee: MediaTek Inc.
    Inventors: Ching-Liou Huang, Ta-Jen Yu