Abstract: In one configuration, a semiconductor package includes a conductive trace embedded in a base and a semiconductor device mounted on the conductive trace via a conductive structure, wherein the conductive structure is a bump structure and the width of the bump structure is bigger than the width of the conductive trace. In another configuration, a method for fabricating a semiconductor package includes providing a base, forming at least one conductive trace on the base, forming an additional insulation material on the base, and defining patterns upon the additional insulation material, wherein the pattern is formed on at least one conductive trace, wherein the conductive structure is a bump structure and the width of the bump structure is bigger than the width of the conductive trace.

Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.

Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.

Abstract: The invention provides a semiconductor package. The semiconductor package includes a semiconductor package includes a substrate having a die attach surface. A die is mounted on die attach surface of the substrate via a conductive pillar bump. The die comprises a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, wherein the length of the first edge is different from that of the second edge from a plan view.

Abstract: An embodiment of the disclosure includes a method of dicing a semiconductor structure. A device layer on a semiconductor substrate is provided. The device layer has a first chip region and a second chip region. A scribe line region is between the first chip region and the second chip region. A protective layer is formed over the device layer thereby over the semiconductor substrate. The protective layer on the scribe line region is laser sawn to form a notch. The notch extends into the semiconductor substrate and the protective layer is formed to cover a portion of the notch. A mechanically sawing is performed through the portion of the protective layer and the substrate to separate the first chip region and the second chip region.

Abstract: Para-iodobenzyltrimethylammonium iodide is useful as an intermediate in the manufacture of the corresponding compounds wherein the para-iodo atom is enriched with an .sup.123 iodine, .sup.125 iodine or .sup.131 iodine isotope. These radio-iodinated derivatives are valuable adrenal scanning agents in consequence of their propensity to localize in the adrenal gland. Moreover, their ability to bind to catecholamine storage sites accounts for their ability to localize in tissue having a large supply of adrenergic nerves such as spleen and sympathetic ganglia. When injected directly into the cerebrospinal fluid, they concentrate in the choroid plexus and in adrenergic innervated tissues such as the substantia nigra.