Patents by Inventor Ta Lin

Ta Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996297
    Abstract: A method of manufacturing a semiconductor device includes forming an underlying structure in a first area and a second area over a substrate. A first layer is formed over the underlying structure. The first layer is removed from the second area while protecting the first layer in the first area. A second layer is formed over the first area and the second area, wherein the second layer has a smaller light transparency than the first layer. The second layer is removed from the first area, and first resist pattern is formed over the first layer in the first area and a second resist pattern over the second layer in the second area.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Ta Chen, Han-Wei Wu, Yuan-Hsiang Lung, Hua-Tai Lin
  • Patent number: 11994736
    Abstract: An imaging lens assembly has an optical axis and includes an annular structure located on an object side of the imaging lens assembly and surrounds the optical axis. The annular structure is located on an object side of the imaging lens assembly, surrounds the optical axis, and includes a first through hole, a second through hole, a first frustum surface, a second frustum surface and a third frustum surface. The first through hole is disposed on an object side of the annular structure, and the second through hole is disposed on an image side of the first through hole. The first frustum surface is disposed on the image side of the first through hole. The second frustum surface is disposed on an object side of the second through hole. The third frustum surface is disposed on an image side of the second through hole.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: May 28, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Yu-Chen Lai, Ming-Ta Chou, Cheng-Feng Lin, Ming-Shun Chang
  • Publication number: 20240167163
    Abstract: An anti-diffusion substrate structure includes a substrate, a substrate circuit layer, and a chip. The substrate has multiple through holes. Within each of the through holes includes a first metal layer and an anti-diffusion layer plated on the first metal layer. The anti-diffusion layer is an Electroless Palladium Immersion Gold (EPIG) layer or an Electroless Nickel Electroless Palladium Immersion Gold (ENEPIG) layer. The substrate circuit layer is mounted on the substrate and extended on the anti-diffusion layer within each of the through holes. The substrate circuit layer is made of a second metal layer, and a composition of the second metal layer is different from a composition of the first metal layer. The chip is electrically connected to the substrate circuit layer. The anti-diffusion layer is able to better prevent material of the first metal layer from migrating or diffusing to the second metal layer.
    Type: Application
    Filed: December 23, 2022
    Publication date: May 23, 2024
    Inventors: YI LING CHEN, WEI TSE HO, CHIN-SHENG WANG, PU-JU LIN, CHENG-TA KO
  • Publication number: 20240169813
    Abstract: A vibrotactile device and method including an audio signal input unit, manual parameter input unit, microcontroller, vibration motor controller, and at least one vibration motor are provided. The microcontroller is coupled to the audio signal input unit and manual parameter input unit. The vibration motor controller is coupled to the microcontroller and the at least one vibration motor. At least one signal is generated by at least the audio signal input unit or the manual parameter input unit. A modulated signal is generated based, in part, on a filtered signal from the audio signal input unit and a vibration duty cycle is generated, based on a tempo value and a note value of the manual parameter input unit, to generate at least one driving parameter, respectively. The vibration motor controller drives the at least one vibration motor based on the at least one driving parameter.
    Type: Application
    Filed: November 23, 2023
    Publication date: May 23, 2024
    Inventors: Chi-Min LIN, Yao Shiao, Chun-Ta Chen, Shang che Lee, Ming Wan Lien
  • Patent number: 11991824
    Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first, second and third sub-circuit boards are electrically connected to one another.
    Type: Grant
    Filed: September 26, 2021
    Date of Patent: May 21, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Cheng-Ta Ko, Pu-Ju Lin, Chi-Hai Kuo, Shao-Chien Lee, Ming-Ru Chen, Cheng-Chung Lo
  • Publication number: 20240162079
    Abstract: A method of manufacturing a semiconductor device includes: forming mutually parallel three-dimensional (3D) conductive channels coated with a conformal sacrificial layer, the 3D conductive channels coated with the conformal sacrificial layer being formed on a semiconductor substrate; depositing a dielectric material to fill spaces between the 3D conductive channels coated with the conformal sacrificial layer, wherein a portion or all of the deposited dielectric material is doped with boron, lithium, or beryllium; performing chemical mechanical polishing (CMP) to remove a top portion of the deposited dielectric material and to expose tops of the 3D conductive channels; and after the CMP, removing the conformal sacrificial layer coating the 3D conductive channels by etching to form 3D dielectric features spaced apart from the 3D conductive channels and comprising the deposited dielectric material.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 16, 2024
    Inventors: Miao-Syuan Fan, Yen Chuang, Yuan-Lin Lin, Ta-Hsiang Kung
  • Patent number: 11985796
    Abstract: A vapor chamber includes a main body. The main body includes a base plate and a top plate. The base plate includes a plate body, a peripheral frame and a plurality of supporting pillars. The plate body has a surface. The peripheral frame is disposed on the surface of the plate body. The surface and the peripheral frame together define a first space. The first space is configured to accommodate a working fluid. The supporting pillars are located in the first space and are distributed on the surface of the plate body. The supporting pillars, the plate body and the peripheral frame are of an integrally-formed structure. The top plate abuts against the peripheral frame and the supporting pillars to seal up the first space.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: May 14, 2024
    Assignee: Jentech Precision Industrial Co., LTD.
    Inventors: Chun-Ta Yeh, Chin-Long Lin
  • Patent number: 11982019
    Abstract: A crystal growth doping apparatus and a crystal growth doping method are provided. The crystal growth doping apparatus includes a crystal growth furnace and a doping device that includes a feeding tube inserted to the furnace body along an oblique insertion direction, and a storage cover and a gate tube that are disposed in the feeding tube. The feeding tube extends from an outer surface thereof to form a placement opening, and the placement opening is recessed from an edge thereof to form an upper recessed portion and a lower recessed portion along the oblique insertion direction. The storage cover includes a storage tank and a handle. When the storage cover is disposed in the gate tube body, the gate tube body is configured to isolate an inner space of the feeding tube from the placement opening.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: May 14, 2024
    Assignee: GLOBALWAFERS CO., LTD.
    Inventors: Yu-Chih Chu, Tang-Chi Lin, Han-Sheng Wu, Hsien-Ta Tseng
  • Patent number: 11975958
    Abstract: An automatic fluid replacement device is adapted to be mounted on an opening of a storage barrel. The automatic fluid replacement device includes a robotic arm, at least one fluid convey joint and a controller. The robotic arm has a gripper. The fluid convey joint includes a convey pipe, a sleeve and a sealing bag. The convey pipe is configured to deliver a fluid. The sleeve is sleeved on the convey pipe. The gripper clamps the sleeve. The sealing bag is sleeved on the sleeve. The controller is configured for automatically controlling the robotic arm to move the fluid convey joint into the opening and controlling the sealing bag to be inflated to seal the opening.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: May 7, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Han Tsai, Wei-Lung Pan, Chih-Ta Wu, I-hsin Lin
  • Patent number: 11971539
    Abstract: An annular optical element includes an outer annular surface, an inner annular surface, a first side surface, a second side surface and a plurality of strip-shaped wedge structures. The outer annular surface surrounds a central axis of the annular optical element and includes at least two shrunk portions. The first side surface connects the outer annular surface and the inner annular surface. The second side surface connects the outer annular surface and the inner annular surface, wherein the second side surface is disposed correspondingly to the first side surface. The strip-shaped wedge structures are disposed on the inner annular surface, wherein each of the strip-shaped wedge structures is disposed along a direction from the first side surface towards the second side surface and includes an acute end and a tapered portion connecting the inner annular surface and the acute end.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: April 30, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Cheng-Feng Lin, Wei-Hung Weng, Ming-Ta Chou
  • Publication number: 20240138059
    Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a first dielectric layer, pads, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A top surface of the first dielectric layer is higher than an upper surface of each pad. The first metal layer is disposed on a first surface of the first dielectric layer. The second dielectric layer has second openings exposing part of the first metal layer. The second metal layer extends into the second openings and is electrically connected to the first metal layer. The third dielectric layer has third openings exposing part of the second metal layer. The surface treatment layer is disposed on the upper surfaces.
    Type: Application
    Filed: November 23, 2022
    Publication date: April 25, 2024
    Applicant: Unimicron Technology Corp.
    Inventors: Kai-Ming Yang, Chia-Yu Peng, Cheng-Ta Ko, Pu-Ju Lin
  • Publication number: 20240138063
    Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.
    Type: Application
    Filed: November 15, 2022
    Publication date: April 25, 2024
    Applicant: Unimicron Technology Corp.
    Inventors: Ping-Tsung Lin, Kai-Ming Yang, Chia-Yu Peng, Pu-Ju Lin, Cheng-Ta Ko
  • Patent number: 11968293
    Abstract: Context information of a handshake between a source entity and a target entity is obtained at a security proxy. The context information is transmitted from the security proxy to a key manager. The key manager maintains a first private key of the security proxy. A first handshake message is received from the key manager. The first handshake message is generated at least based on the context information and signed with the first private key. The first handshake message is then transmitted to the target entity.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: April 23, 2024
    Assignee: International Business Machines Corporation
    Inventors: Wei-Hsiang Hsiung, Chun-Shuo Lin, Wei-Jie Liau, Cheng-Ta Lee
  • Publication number: 20240128179
    Abstract: A package structure includes a first substrate, a second substrate disposed on the first substrate, a third substrate disposed on the second substrate, and multiple chips mounted on the third substrate. A second coefficient of thermal expansion (CTE) of the second substrate is less than a first CTE of the first substrate. The third substrate includes a first sub-substrate, a second sub-substrate in the same level with the first sub-substrate, a third sub-substrate in the same level with the first sub-substrate. A CTE of the first sub-substrate, a CTE of the second sub-substrate, and a CTE of the third sub-substrate are less than the second CTE of the second substrate.
    Type: Application
    Filed: November 8, 2022
    Publication date: April 18, 2024
    Inventors: Jyun-Hong CHEN, Chi-Hai KUO, Pu-Ju LIN, Cheng-Ta KO
  • Patent number: 11963385
    Abstract: The disclosure provides a local stretch packaging structure, including a substrate, a flexible electronic element, a plurality of light-emitting display elements, and a packaging layer. The flexible electronic element is disposed on the substrate. These light-emitting display elements are disposed on the flexible electronic element. The packaging layer includes a packaging area and a non-packaging area. The packaging area covers the upper surface and sidewalls of these light-emitting display elements. The non-packaging area is directly covered the flexible electronic element that is not disposed with these light-emitting display elements.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: April 16, 2024
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: Wen-You Lai, Ping-Hsiang Kao, Po-Lun Chen, Chun-Ta Chen, Po-Ching Lin, Ya-Chu Hsu
  • Patent number: 11961738
    Abstract: In a method of forming a pattern, a first pattern is formed over an underlying layer, the first pattern including main patterns and a lateral protrusion having a thickness of less than 25% of a thickness of the main patterns, a hard mask layer is formed over the first pattern, a planarization operation is performed to expose the first pattern without exposing the lateral protrusion, a hard mask pattern is formed by removing the first pattern while the lateral protrusion being covered by the hard mask layer, and the underlying layer is patterned using the hard mask pattern as an etching mask.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Ta Chen, Hua-Tai Lin, Han-Wei Wu, Jiann-Yuan Huang
  • Patent number: 11961890
    Abstract: A semiconductor device includes a semiconductor layer and a gate structure on the semiconductor layer. The gate structure includes a multi-stepped gate dielectric on the semiconductor layer and a gate electrode on the multi-stepped gate dielectric. The multi-stepped gate dielectric includes a first gate dielectric segment having a first thickness and a second gate dielectric segment having a second thickness that is less than the first thickness.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Fu Lin, Chia-Ta Hsieh, Tsung-Hao Yeh
  • Patent number: 11951901
    Abstract: A display system suitable for a vehicle is provided. The display system suitable for the vehicle includes a center console, a processing device, and a display device. The center console is configured to generate a power sequence according to a customization setting, and the power sequence corresponds to content of a data table. The processing device is configured to receive the power sequence and decodes the power sequence through a lookup table to generate a decoding result. The lookup table includes the content of the data table. The display device is coupled to the processing device and is configured to display a display image according to the decoding result.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: April 9, 2024
    Assignee: Coretronic Corporation
    Inventors: Jui-Ta Liu, Wen-Chang Chien, Tsung-Hsin Yeh, Shao-Chi Lin
  • Patent number: 11955587
    Abstract: A light emitting diode (LED) package structure includes a glass substrate, conductive through holes, active elements, an insulating layer, LEDs and pads. The glass substrate has an upper surface and a lower surface. The conductive through holes penetrate the glass substrate and connect the upper and the lower surfaces. The active elements are disposed on the upper surface of the glass substrate and electrically connected to the conductive through holes. The insulating layer is disposed on the upper surface and covers the active elements. The LEDs are disposed on the insulating layer and electrically connected to at least one of the active elements. The pads are disposed on the lower surface of the glass substrate and electrically connected to the conductive through holes. A source of at least one active elements is directly electrically connected to at least one of the corresponding pads through the corresponding conductive through hole.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: April 9, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Jeng-Ting Li, Chi-Hai Kuo, Cheng-Ta Ko, Pu-Ju Lin
  • Patent number: D1028858
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: May 28, 2024
    Assignee: Cheng Shin Rubber Industrial Co., Ltd.
    Inventors: Min-Chi Lin, Yi-Ta Lu, Yi-Zhen Huang, Ssu Yu Kuo, Yu-Hao Hsu, Jyun De Li, Yu Nan Sung, Jyun-Yi Ke