Abstract: A phased array transmitter includes a plurality of signal couplers arranged to receive a radio frequency (RF) input signal, and a plurality of RF transmitters coupled to the signal couplers. Each RF transmitter includes a radiating element, a chip and a phase shifting circuit. The radiating element is arranged to receive a plurality of electrical signals to produce an RF output signal. An amplifier circuit of the chip is configured to amplify the RF input signal to generate a plurality of amplified signals at a plurality of output terminals, respectively. The phase shifting circuit is located outside the chip, and coupled to the output terminals and the radiating element. The phase shifting circuit is arranged to phase shift the amplified signals, and accordingly generate the electrical signals fed to the radiating element. Respective phase shifting circuits and respective radiating elements of the RF transmitters are formed on a same substrate.

Abstract: A method for manufacturing a first radio-frequency (RF) device, including: receiving a substrate having the first RF device, wherein the first RF device has a signal port for receiving or transmitting RF signals with an input impedance greater than ten times an input impedance of a testing tool; causing a probe assembly to connect to the signal port and the testing tool; and causing the probe assembly to connect to a first terminal of a resistive element having a resistance equal to the input impedance.

Abstract: A bias voltage generating circuit includes an amplifier circuit and a negative feedback circuit. The amplifier circuit is configured to generate a bias voltage according to a first voltage input and a second voltage input. The negative feedback circuit is coupled to the amplifier circuit, and configured to control the first voltage input. The negative feedback circuit includes a first voltage generator and a second voltage generator. The first voltage generator, coupled to the amplifier circuit, is biased by the bias voltage and configured to amplify a third voltage input to generate the first voltage input. The second voltage generator, coupled to the first voltage generator, is configured to generate the third voltage input. A ratio of the first voltage input to the third voltage input is locked according to a ratio of the second voltage input to the third voltage input.

Abstract: The present application discloses a radio frequency (RF) device. The radio frequency device includes a power amplifier, a power detector, and a digital signal processor (DSP). The power amplifier outputs a RF signal. The power detector receives the RF signal, and performs a plurality of calibration operations to generate a plurality of calibration voltages corresponding to a plurality of bias voltage, wherein the calibration operations are performed at the bias voltages respectively, and the calibration voltages are temperature-correlated due to that electrical characteristics of the power detector are temperature-correlated. The DSP controls the power detector to operate at the bias voltages, obtains an index voltage for indicating power of the RF signal by performing calculations upon the calibration voltages to reduce temperature dependency of the index voltage, and adjusts a gain of the power amplifier according to the index voltage.

Abstract: A method for manufacturing a first radio-frequency (RF) device, including: receiving a substrate having the first RF device, wherein the first RF device has a signal port for receiving or transmitting RF signals with an input impedance greater than ten times an input impedance of a testing tool; causing a probe assembly to connect to the signal port and the testing tool; and causing the probe assembly to connect to a first terminal of a resistive element having a resistance equal to the input impedance.

Abstract: A wireless communication system includes a plurality of antennas, and a plurality of RF chips, arranged in a row and coupled to the antennas, for providing a plurality radio-frequency (RF) output signals to the antennas according to an RF signal. The wireless communication system also includes a transmission line arranged to be a straight line in parallel to the row, and to connect to the RF chips, and a resistive load, coupled to a first end of the transmission line. A second end of the transmission line is arranged to receive the RF signal.

Abstract: A radio frequency (RF) transmitter includes a radiating element, a chip and a phase shifting circuit. The radiating element is arranged to receive a plurality of electrical signals to produce an RF output signal. The chip includes an amplifier circuit. The amplifier circuit is configured to amplify an RF input signal to generate a plurality of amplified signals at a plurality of output terminals, respectively. The phase shifting circuit is located outside the chip, and coupled to the output terminals and the radiating element. The phase shifting circuit is arranged to phase shift the amplified signals, and accordingly generate the electrical signals fed to the radiating element. The phase shifting circuit and the radiating element are formed on a same substrate.

Abstract: A radio frequency (RF) receiver includes a radiating element, a chip and a phase shifting circuit. The radiating element is arranged to receive an RF input signal to produce a plurality of electrical signals. The chip includes an amplifier circuit. The amplifier circuit is configured to receive a plurality of phase shifted signals from a plurality of input terminals respectively, and amplify the phase shifted signals to generate an RF output signal. The phase shifting circuit is located outside the chip, and coupled to the output terminals and the input terminals. The phase shifting circuit is arranged to phase shift the electrical signals and accordingly generate the phase shifted signals. The phase shifting circuit and the radiating element are formed on a same substrate.

Abstract: A signal converting apparatus includes a comparing device, a first digital-slope quantizer, and a second digital-slope quantizer. The comparing device having a first input terminal and a second input terminal for receiving a first received signal and a second received signal, and for generating an output signal at an output port. The first digital-slope quantizer generates a first set of digital signals to monotonically adjust the first received signal and the second received signal at the first input terminal and the second input terminal during a first phase according to a first quantization unit. The second digital-slope quantizer generates a second set of digital signals to monotonically adjust the first received signal and the second received signal at the first input terminal and the second input terminal during a second phase after the first phase according to a second quantization unit.

Abstract: A signal distribution system includes: a first signal divider arranged to generate a first output oscillating signal according to a first input oscillating signal; a second signal divider arranged to generate a second output oscillating signal according to the first input oscillating signal; a first transmitting channel coupled to the first signal divider and the second divider for transmitting the first input oscillating signal to the first signal divider and the second signal divider; and a second transmitting channel coupled to the first signal divider and the second divider for transmitting a second input oscillating signal to the first signal divider and the second signal divider; wherein the first input oscillating signal has a first frequency, the second input oscillating signal has a second frequency, and the second frequency is smaller than the first frequency.

Abstract: A signal distribution system includes: a first signal divider arranged to generate a first output oscillating signal according to a first input oscillating signal; a second signal divider arranged to generate a second output oscillating signal according to the first input oscillating signal; a first transmitting channel coupled to the first signal divider and the second divider for transmitting the first input oscillating signal to the first signal divider and the second signal divider; and a second transmitting channel coupled to the first signal divider and the second divider for transmitting a second input oscillating signal to the first signal divider and the second signal divider; wherein the first input oscillating signal has a first frequency, the second input oscillating signal has a second frequency, and the second frequency is smaller than the first frequency.

Abstract: A signal divider includes: a dividing circuit arranged to generate an output oscillating signal according to a first input oscillating signal; and a signal generating circuit, coupled to the dividing circuit, for generating an injection signal to the dividing circuit. The dividing circuit is arranged to generate the output oscillating signal with a predetermined phase according to the injection signal and the first input oscillating signal.

Abstract: A signal converting apparatus includes a comparing device, a first digital-slope quantizer, and a second digital-slope quantizer. The comparing device having a first input terminal and a second input terminal for receiving a first received signal and a second received signal, and for generating an output signal at an output port. The first digital-slope quantizer generates a first set of digital signals to monotonically adjust the first received signal and the second received signal at the first input terminal and the second input terminal during a first phase according to a first quantization unit. The second digital-slope quantizer generates a second set of digital signals to monotonically adjust the first received signal and the second received signal at the first input terminal and the second input terminal during a second phase after the first phase according to a second quantization unit.

Abstract: A signal converting apparatus includes a comparing device, a first digital-slope quantizer, and a second digital-slope quantizer. The comparing device has a first input terminal and a second input terminal for receiving a received signal and an adjustable reference voltage respectively, and for generating an output signal at an output port. The first digital-slope quantizer is coupled to the output port and the second input terminal for generating a first set of digital signals to monotonically adjust the adjustable reference voltage at the second input terminal during a first phase according to a first quantization unit. The second digital-slope quantizer is coupled to the output port and the second input terminal for generating a second set of digital signals to monotonically adjust the adjustable reference voltage at the second input terminal during a second phase after the first phase according to a second quantization unit.

Abstract: A signal converting apparatus includes a comparing device, a first digital-slope quantizer, and a second digital-slope quantizer. The comparing device has a first input terminal and a second input terminal for receiving a received signal and an adjustable reference voltage respectively, and for generating an output signal at an output port. The first digital-slope quantizer is coupled to the output port and the second input terminal for generating a first set of digital signals to monotonically adjust the adjustable reference voltage at the second input terminal during a first phase according to a first quantization unit. The second digital-slope quantizer is coupled to the output port and the second input terminal for generating a second set of digital signals to monotonically adjust the adjustable reference voltage at the second input terminal during a second phase after the first phase according to a second quantization unit.

Abstract: A signal divider includes: a dividing circuit arranged to generate an output oscillating signal according to a first input oscillating signal; and a signal generating circuit, coupled to the dividing circuit, for generating an injection signal to the dividing circuit. The dividing circuit is arranged to generate the output oscillating signal with a predetermined phase according to the injection signal and the first input oscillating signal.

Abstract: Systems and methods of restraining reverse engineering process for analog integrated circuit use techniques of adding dummy devices, device fragmentation, increasing bus width, employing different layouts for the same circuit element and mixing different types of passive devices increase complexity and makes the layout floorplan more difficult to be extracted for the reverse engineering. The system adds dummy devices and ensures the extra devices and capacitance do not affect the target circuit performance.

Abstract: A wireless transceiver includes: a switching amplifier having first, second and power ports; and a current provider. The current provider provides a current to the power port, and further provides an impedance to the power port such that an impedance of the switching amplifier at the second port matches an impedance of an antenna coupled to the second port. The switching amplifier simultaneously amplifies a transmit signal input received at the first port to generate an output signal at the second port for receipt by the antenna, and mixes a receive signal received at the second port from the antenna with the transmit signal input to generate, at the power port, another output signal having a frequency lower than that of the receive signal.

Abstract: A wireless transceiver includes: a switching amplifier having first, second and power ports; and a current provider. The current provider provides a current to the power port, and further provides an impedance to the power port such that an impedance of the switching amplifier at the second port matches an impedance of an antenna coupled to the second port. The switching amplifier simultaneously amplifies a transmit signal input received at the first port to generate an output signal at the second port for receipt by the antenna, and mixes a receive signal received at the second port from the antenna with the transmit signal input to generate, at the power port, another output signal having a frequency lower than that of the receive signal.

Abstract: Systems and methods of restraining reverse engineering process for analog integrated circuit use techniques of adding dummy devices, device fragmentation, increasing bus width, employing different layouts for the same circuit element and mixing different types of passive devices increase complexity and makes the layout floorplan more difficult to be extracted for the reverse engineering. The system adds dummy devices and ensures the extra devices and capacitance do not affect the target circuit performance.