Patents by Inventor Tadashi Kawashima

Tadashi Kawashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240067168
    Abstract: A vehicle controller includes a processor configured to detect a vehicle ahead of a host vehicle from time-series sensor signals obtained by a sensor provided on the host vehicle for sensing objects around the host vehicle, track the vehicle ahead detected from the time-series sensor signals, determine whether the vehicle ahead has performed an avoidance action, based on the result of tracking, detect, when the vehicle ahead has performed an avoidance action, a trajectory of an edge of the vehicle ahead opposite a direction of avoidance in the avoidance action, and control travel of the host vehicle so that an edge of the host vehicle opposite the direction of avoidance moves along the detected trajectory.
    Type: Application
    Filed: July 21, 2023
    Publication date: February 29, 2024
    Applicant: Toyota Jidosha Kabushiki Kaisha
    Inventors: Ryusuke KURODA, Kenichiro Aoki, Tetsuro Sugiura, Takuya Fujiki, Hitoshi Kamada, Wataru Kawashima, Tadashi Okubo
  • Publication number: 20240071097
    Abstract: An apparatus for object detection detects a number of lanes included in a road on which a vehicle is traveling, detects one or more surrounding vehicles positioned in surroundings of the vehicle from a surrounding image showing the surroundings of the vehicle generated by a camera mounted in the vehicle, and determines, when more surrounding vehicles than the number of lanes detected in a predetermined range at the back of the vehicle are detected alongside in a width direction of the vehicle, that a possibility that any one of the surrounding vehicles being an emergency vehicle which is allowed to travel without obeying the traveling rule of the road is higher than when more surrounding vehicles than the number of lanes are not detected alongside in a width direction of the vehicle.
    Type: Application
    Filed: August 10, 2023
    Publication date: February 29, 2024
    Inventors: Takuya Fujiki, Ryusuke Kuroda, Tadashi Okubo, Kenichiro Aoki, Tetsuro Sugiura, Wataru Kawashima, Hitoshi Kamada
  • Patent number: 11462409
    Abstract: An epitaxial silicon wafer includes: a silicon wafer doped with phosphorus as a dopant and having an electrical resistivity of less than 1.0 m ?·cm; and an epitaxial film formed on the silicon wafer. The silicon wafer includes: a main surface to which a (100) plane is inclined; and a [100] axis that is perpendicular to the (100) plane and inclined at an angle ranging from 0°30? to 0°55? in any direction with respect to an axis perpendicular to the main surface. The epitaxial silicon wafer has at most 1/cm2 of a density of a hillock defect generated thereon.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: October 4, 2022
    Assignee: SUMCO CORPORATION
    Inventors: Naoya Nonaka, Tadashi Kawashima, Katsuya Ookubo
  • Patent number: 10867791
    Abstract: A manufacturing method of an epitaxial silicon wafer uses a silicon wafer containing phosphorus, having a resistivity of less than 1.0 m?·cm. The silicon wafer has a main surface to which a (100) plane is inclined and a [100] axis that is perpendicular to the (100) plane and inclined at an angle ranging from 0°5? to 0°25? with respect to an axis orthogonal to the main surface. The manufacturing method includes: annealing the silicon wafer at a temperature from 1200 degrees C. to 1220 degrees C. for 30 minutes or more under argon gas atmosphere (argon-annealing step); etching a surface of the silicon wafer (prebaking step); and growing the epitaxial film at a growth temperature ranging from 1100 degrees C. to 1165 degrees C. on the surface of the silicon wafer (epitaxial film growth step).
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: December 15, 2020
    Assignee: SUMCO CORPORATION
    Inventors: Naoya Nonaka, Tadashi Kawashima, Kenichi Mizogami
  • Publication number: 20200027727
    Abstract: A manufacturing method of an epitaxial silicon wafer uses a silicon wafer containing phosphorus, having a resistivity of less than 1.0 m?·cm. The silicon wafer has a main surface to which a (100) plane is inclined and a [100] axis that is perpendicular to the (100) plane and inclined at an angle ranging from 0°5? to 0°25? with respect to an axis orthogonal to the main surface. The manufacturing method includes: annealing the silicon wafer at a temperature from 1200 degrees C. to 1220 degrees C. for 30 minutes or more under argon gas atmosphere (argon-annealing step); etching a surface of the silicon wafer (prebaking step); and growing the epitaxial film at a growth temperature ranging from 1100 degrees C. to 1165 degrees C. on the surface of the silicon wafer (epitaxial film growth step).
    Type: Application
    Filed: March 28, 2018
    Publication date: January 23, 2020
    Applicant: SUMCO CORPORATION
    Inventors: Naoya NONAKA, Tadashi KAWASHIMA, Kenichi MIZOGAMI
  • Publication number: 20190181007
    Abstract: An epitaxial silicon wafer includes: a silicon wafer doped with phosphorus as a dopant and having an electrical resistivity of less than 1.0 m ?·cm; and an epitaxial film formed on the silicon wafer. The silicon wafer includes: a main surface to which a (100) plane is inclined; and a [100] axis that is perpendicular to the (100) plane and inclined at an angle ranging from 0°30? to 0°55? in any direction with respect to an axis perpendicular to the main surface. The epitaxial silicon wafer has at most 1/cm2 of a density of a hillock defect generated thereon.
    Type: Application
    Filed: August 7, 2017
    Publication date: June 13, 2019
    Applicant: SUMCO CORPORATION
    Inventors: Naoya NONAKA, Tadashi KAWASHIMA, Katsuya OOKUBO
  • Patent number: 10253429
    Abstract: A method includes: a step of forming an oxide film on a backside of a silicon wafer; a step of removing the oxide film present at an outer periphery of the silicon wafer; a step of argon annealing in which a heat treatment is performed in an argon gas atmosphere; and a step of forming an epitaxial film on a surface of the silicon wafer, the step of forming the epitaxial film including: a step of pre-baking in which the silicon wafer is subjected to a heat treatment in an gas atmosphere containing hydrogen and hydrogen chloride to etch an outer layer of the silicon wafer; and a step of growing the epitaxial film on the surface of the silicon wafer.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: April 9, 2019
    Assignee: SUMCO CORPORATION
    Inventors: Naoya Nonaka, Tadashi Kawashima
  • Patent number: 10005196
    Abstract: A cutting apparatus includes a first motor to move a carriage, a second motor to cause a cutter to approach a work material, and a controller configured or programmed to control the first motor and the second motor. The controller includes a load detector to detect a load of the first motor, a storage storing a first relationship between the load of the first motor and a supply signal to the second motor, and a cutting pressure controller configured or programmed to control a cutting pressure applied from the cutter to the work material based on the first relationship and the load of the first motor detected by the load detector.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: June 26, 2018
    Assignee: ROLAND DG CORPORATION
    Inventors: Shinya Yamamoto, Takeshi Tozuka, Yuichi Kitagawa, Tadashi Kawashima
  • Publication number: 20180087184
    Abstract: A method includes: a step of forming an oxide film on a backside of a silicon wafer; a step of removing the oxide film present at an outer periphery of the silicon wafer; a step of argon annealing in which a heat treatment is performed in an argon gas atmosphere; and a step of forming an epitaxial film on a surface of the silicon wafer, the step of forming the epitaxial film including: a step of pre-baking in which the silicon wafer is subjected to a heat treatment in an gas atmosphere containing hydrogen and hydrogen chloride to etch an outer layer of the silicon wafer; and a step of growing the epitaxial film on the surface of the silicon wafer.
    Type: Application
    Filed: April 5, 2016
    Publication date: March 29, 2018
    Applicant: SUMCO CORPORATION
    Inventors: Naoya NONAKA, Tadashi KAWASHIMA
  • Patent number: 9902165
    Abstract: In an ink supply system, a main ink tank and an ink head are connected together via a main supply channel. A sub-ink tank is connected to the main supply channel via a sub-supply channel. An upstream-side valve is provided on an upstream-side portion of the main supply channel. During standby, a first standby setting processor of a controller sets a first standby state in which a first upstream-side valve is open, and a second standby setting processor sets a second standby state in which the first upstream-side valve is closed. A standby state determination processor determines whether or not the amount of time elapsed from when a setting operation was done by the first standby setting processor or the second standby setting processor is greater than or equal to a first amount of time. The standby state switching processor switches between the first standby state and the second standby state when it is determined that the elapsed time is greater than or equal to the first amount of time.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: February 27, 2018
    Assignee: ROLAND DG CORPORATION
    Inventors: Tadashi Kawashima, Yasuhiko Kobayashi, Takefumi Endo, Yusuke Takano, Teppei Sawada
  • Publication number: 20170274668
    Abstract: In an ink supply system, a main ink tank and an ink head are connected together via a main supply channel. A sub-ink tank is connected to the main supply channel via a sub-supply channel. An upstream-side valve is provided on an upstream-side portion of the main supply channel. During standby, a first standby setting processor of a controller sets a first standby state in which a first upstream-side valve is open, and a second standby setting processor sets a second standby state in which the first upstream-side valve is closed. A standby state determination processor determines whether or not the amount of time elapsed from when a setting operation was done by the first standby setting processor or the second standby setting processor is greater than or equal to a first amount of time. The standby state switching processor switches between the first standby state and the second standby state when it is determined that the elapsed time is greater than or equal to the first amount of time.
    Type: Application
    Filed: March 16, 2017
    Publication date: September 28, 2017
    Inventors: Tadashi KAWASHIMA, Yasuhiko KOBAYASHI, Takefumi ENDO, Yusuke TAKANO, Teppei SAWADA
  • Patent number: 9755022
    Abstract: An epitaxial silicon wafer includes a silicon wafer added with phosphorus so that resistivity of the silicon wafer falls at or below 0.9 m?·cm, an epitaxial film formed on a first side of the silicon wafer, and an oxidation film formed on a second side of the silicon wafer opposite to the first side, wherein an average number of Light Point Defect of a size of 90 nm or more observed on a surface of the epitaxial film is one or less per square centimeter.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: September 5, 2017
    Assignees: SUMCO TECHXIV CORPORATION, SUMCO CORPORATION
    Inventors: Tadashi Kawashima, Naoya Nonaka, Masayuki Shinagawa, Gou Uesono
  • Publication number: 20170066152
    Abstract: A cutting apparatus includes a first motor to move a carriage, a second motor to cause a cutter to approach a work material, and a controller configured or programmed to control the first motor and the second motor. The controller includes a load detector to detect a load of the first motor, a storage storing a first relationship between the load of the first motor and a supply signal to the second motor, and a cutting pressure controller configured or programmed to control a cutting pressure applied from the cutter to the work material based on the first relationship and the load of the first motor detected by the load detector.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 9, 2017
    Inventors: Shinya YAMAMOTO, Takeshi TOZUKA, Yuichi KITAGAWA, Tadashi KAWASHIMA
  • Patent number: 9425264
    Abstract: A method includes: a backside-oxidation-film-formation step in which an oxidation film is formed on a backside of a silicon wafer; a backside-oxidation-film-removal step in which the oxidation film provided at an outer periphery of the silicon wafer is removed; an argon-annealing step in which the silicon wafer after the backside-oxidation-film-removal step is subjected to a heat treatment in an argon gas atmosphere at a temperature in a range from 1200 to 1220 degrees C. for 60 minutes or more and 120 minutes or less; and an epitaxial-film-formation step in which an epitaxial film is formed on a surface of the silicon wafer after the argon-annealing step.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: August 23, 2016
    Assignees: SUMCO CORPORATION, SUMCO TECHXIV CORPORATION
    Inventors: Tadashi Kawashima, Naoya Nonaka, Masayuki Shinagawa, Gou Uesono
  • Publication number: 20150380493
    Abstract: An epitaxial silicon wafer includes a silicon wafer added with phosphorus so that resistivity of the silicon wafer falls at or below 0.9 m?·cm, an epitaxial film formed on a first side of the silicon wafer, and an oxidation film formed on a second side of the silicon wafer opposite to the first side, wherein an average number of Light Point Defect of a size of 90 nm or more observed on a surface of the epitaxial film is one or less per square centimeter.
    Type: Application
    Filed: September 10, 2015
    Publication date: December 31, 2015
    Applicants: SUMCO CORPORATION, SUMCO TECHXIV CORPORATION
    Inventors: Tadashi KAWASHIMA, Naoya NONAKA, Masayuki SHINAGAWA, Gou UESONO
  • Patent number: 8956927
    Abstract: A method of manufacturing an epitaxial silicon wafer including a silicon wafer having a surface added with phosphorus and an epitaxial film provided on the surface includes adjusting an in-plane thickness distribution of the epitaxial film formed on the surface of the silicon wafer based on an in-plane resistivity distribution of the silicon wafer before an epitaxial growth treatment.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: February 17, 2015
    Assignee: Sumco Techxiv Corporation
    Inventors: Tadashi Kawashima, Naoya Nonaka
  • Patent number: 8659020
    Abstract: It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A silicon epitaxial layer is grown by a CVD method on the surface of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration. After that, a PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: February 25, 2014
    Assignee: Sumco Corporation
    Inventors: Tadashi Kawashima, Masahiro Yoshikawa, Akira Inoue, Yoshiya Yoshida
  • Publication number: 20140001605
    Abstract: A method includes: a backside-oxidation-film-formation step in which an oxidation film is formed on a backside of a silicon wafer; a backside-oxidation-film-removal step in which the oxidation film provided at an outer periphery of the silicon wafer is removed; an argon-annealing step in which the silicon wafer after the backside-oxidation-film-removal step is subjected to a heat treatment in an argon gas atmosphere at a temperature in a range from 1200 to 1220 degrees C. for 60 minutes or more and 120 minutes or less; and an epitaxial-film-formation step in which an epitaxial film is formed on a surface of the silicon wafer after the argon-annealing step.
    Type: Application
    Filed: June 24, 2013
    Publication date: January 2, 2014
    Inventors: Tadashi Kawashima, Naoya Nonaka, Masayuki Shinagawa, Gou Uesono
  • Publication number: 20130337638
    Abstract: A method of manufacturing an epitaxial silicon wafer including a silicon wafer having a surface added with phosphorus and an epitaxial film provided on the surface includes adjusting an in-plane thickness distribution of the epitaxial film formed on the surface of the silicon wafer based on an in-plane resistivity distribution of the silicon wafer before an epitaxial growth treatment.
    Type: Application
    Filed: June 13, 2013
    Publication date: December 19, 2013
    Inventors: Tadashi KAWASHIMA, Naoya NONAKA
  • Patent number: 8420514
    Abstract: It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration to execute a baking treatment. After a surface layer of the silicon crystal substrate is then polished up to a predetermined amount, a silicon epitaxial layer is grown by a CVD method. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: April 16, 2013
    Assignee: Sumco Corporation
    Inventors: Tadashi Kawashima, Masahiro Yoshikawa, Akira Inoue, Yoshiya Yoshida, Kazuhiro Iriguchi, Toshiyuki Isami