Patents by Inventor Tadashi Kawashima

Tadashi Kawashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120112190
    Abstract: It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A silicon epitaxial layer is grown by a CVD method on the surface of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration. After that, a PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.
    Type: Application
    Filed: May 28, 2010
    Publication date: May 10, 2012
    Applicant: SUMCO CORPORATION
    Inventors: Tadashi Kawashima, Masahiro Yoshikawa, Akira Inoue, Yoshiya Yoshida
  • Publication number: 20120112319
    Abstract: It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration to execute a baking treatment. After a surface layer of the silicon crystal substrate is then polished up to a predetermined amount, a silicon epitaxial layer is grown by a CVD method. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.
    Type: Application
    Filed: July 1, 2010
    Publication date: May 10, 2012
    Applicant: SUMCO CORPORATION
    Inventors: Tadashi Kawashima, Masahiro Yoshikawa, Akira Inoue, Yoshiya Yoshida, Kazuhiro Iriguchi, Toshiyuki Isami
  • Patent number: 8153651
    Abstract: Compounds are disclosed that have a formula represented by the following: The compounds may be prepared as pharmaceutical compositions, and may be used for the prevention and treatment of a variety of conditions in mammals including humans, including by way of non-limiting example, pain, inflammation, traumatic injury, and others.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: April 10, 2012
    Assignee: Evotec AG
    Inventors: Matthew Cox, Donogh John Roger O'Mahony, Maria De Los Angeles Estiarte-Martinez, Tadashi Kawashima, Satoshi Nagayama, Yuji Shishido, Hirotaka Tanaka, Matthew Alexander James Duncton, Andrew Antony Calabrese
  • Patent number: 8134004
    Abstract: This invention provides a compound of the formula (I): And their use for the treatment of disease conditions caused by overactivation of the VR1 receptor such as pain, or the like in mammal. This invention also provides a pharmaceutical composition comprising the above compound.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: March 13, 2012
    Assignee: Pfizer Inc.
    Inventors: Tadashi Kawashima, Satoshi Nagayama, Kazunari Nakao, Hirotaka Tanaka
  • Publication number: 20110021514
    Abstract: Compounds are disclosed that have a formula represented by the following: The compounds may be prepared as pharmaceutical compositions, and may be used for the prevention and treatment of a variety of conditions in mammals including humans, including by way of non-limiting example, pain, inflammation, traumatic injury, and others.
    Type: Application
    Filed: November 13, 2008
    Publication date: January 27, 2011
    Applicants: RENOVIS, INC., PFIZER GLOBAL RESEARCH AND DEVELOPMENT
    Inventors: Matthew Cox, Donogh John Roger O'Mahony, Maria De Los Angeles Estiarte-Martinez, Tadashi Kawashima, Satoshi Nagayama, Yuji Shishido, Hirotaka Tanaka, Matthew Alexander James Duncton, Andrew Antony Calabrese
  • Publication number: 20090253740
    Abstract: This invention provides a compound of the formula (I): And their use for the treatment of disease conditions caused by overactivation of the VR1 receptor such as pain, or the like in mammal. This invention also provides a pharmaceutical composition comprising the above compound.
    Type: Application
    Filed: July 2, 2007
    Publication date: October 8, 2009
    Inventors: Tadashi Kawashima, Satoshi Nagayama, Kazunari Nakao, Hirotaka Tanaka
  • Publication number: 20050118616
    Abstract: The present disclosure relates to methods for amplifying nucleic acids and methods for detecting the amplified nucleic acid products. Nucleic acid amplification and detection can occur in solution or on a solid support.
    Type: Application
    Filed: August 9, 2004
    Publication date: June 2, 2005
    Inventors: Tadashi Kawashima, Erik Holmlin, Donald Crothers, Honghua Zhang, Chunnian Shi
  • Patent number: 5363384
    Abstract: A digital audio signal demodulation circuit comprises a synchronous detection circuit (18) and a muting circuit (17) for muting the output from an interpolation circuit (16) using a synchronization lock signal generated from the synchronous detection circuit (18) when synchronization has been lost. The differential signal output from the interpolation circuit (16) is muted by the muting circuit (17) and thereafter integrated by an integration circuit (19). Thus, an audio signal with high sound quality can be demodulated without producing interruption noise even when synchronization has been lost or forcible muting is done.
    Type: Grant
    Filed: December 10, 1993
    Date of Patent: November 8, 1994
    Assignees: Matsushita Electric Industrial, Co., Ltd., Nippon Hoso Kyokai
    Inventors: Toshihiro Miyoshi, Naoji Okumura, Hisashi Arita, Kenji Ishikawa, Yuichi Ninomiya, Yoshimichi Ohtsuka, Tadashi Kawashima, Takushi Iwamoto
  • Patent number: 5163053
    Abstract: An audio signal demodulating circuit comprises a counter circuit (11) for detecting the number of samples for which interpolation is to be successively made by counting the output from an error correction circuit (2) and an AND circuit 10 for taking the logical product of the output from the counter circuit and the mute signal generated when synchronization has been lost. If interpolation is to be successively made for m (integer) or more, an audio differential signal is muted using a mute signal so as to remove the signal with greatly deteriorated audio quality. This can remove large audio distortion generated if interpolation is only successively made for error correction when errors successively occur for samples.
    Type: Grant
    Filed: August 6, 1990
    Date of Patent: November 10, 1992
    Assignees: Matsushita Electric Industrial Co., Ltd., Nippon Hoso Kyokai
    Inventors: Naoji Okumura, Toshihiro Miyoshi, Yuichi Ninomiya, Yoshimichi Ohtsuka, Tadashi Kawashima, Takushi Iwamoto
  • Patent number: 5121212
    Abstract: In an audio signal demodulating circuit, an externally supplied reference clock signal is frequency-divided so that the frequency-divided clock signals are supplied to circuit units constituting the audio signal demodulating circuit as clock signals having lower frequencies. A logic circuit is provided to respond to a timing pulse generated synchronously with a video signal so as to set input data or clock signals supplied to the aforementioned circuit units to a low level or a high level during a time period other than the time period of an audio signal, whereby electric power consumption in the audio signal demodulating circuit is markedly reduced.
    Type: Grant
    Filed: August 6, 1990
    Date of Patent: June 9, 1992
    Assignees: Matsushita Electric Industrial Co., Ltd., Nippon Hoso Kyokai
    Inventors: Naoji Okumura, Hisashi Arita, Yuichi Ninomiya, Yoshimichi Ohtsuka, Tadashi Kawashima, Takushi Iwamoto
  • Patent number: 4998106
    Abstract: An automatic gain control system for controlling a gain of an A/D converter automatically by controlling reference voltages of said A/D converter at the time of analog-to-digital conversion of a signal which signal being clamped by a clamp circuit to a clamp level which is set to a center level before entering said A/D converter, comprising a clamp level control circuit for detecting the clamp level from an output of said A/D converter to control the clamp level; a first A/D converter for digital-to-analog converting an output of said clamp level control circuit; an automatic clamp level control system.
    Type: Grant
    Filed: March 3, 1989
    Date of Patent: March 5, 1991
    Assignees: Matsushita Electric Industrial Co., Ltd., Nippon Hoso Kyokai
    Inventors: Toyokastu Koga, Isao Kawahara, Yoshimichi Ohtsuka, Tadashi Kawashima, Yuichi Ninomiya
  • Patent number: 4006944
    Abstract: A spindle device has pre-loaded anti-friction bearings which are so lubricated with oil jet accelerated through jet nozzles facing thereto that very high speed rotation with lower levelled vibration is permitted for the spindle.The spindle assembly has a rear bearing holder longitudinally slidable in the housing for pre-loading and cooling oil flows in the bearing holder. The spindle assembly further has a high frequency electric motor therein and is sealed up against dust penetration from outside.Air or oil vapor is prevented from staying in the sealed spindle assembly by a gas outlet which is provided in the assembly. Jetted oil toward the bearings and bearing holder cooling oil are recollected through a suction pump into a reservoir, and are fed by a pressurizing pump from the reservoir to the spindle assembly. Oil is there cooled by a cooling device.The circulating oil temperature and oil amount are detected by sensors to be observed.
    Type: Grant
    Filed: August 4, 1975
    Date of Patent: February 8, 1977
    Assignee: Kabushiki Kaisha Daini Seikosha
    Inventors: Shigenori Ando, Masato Ota, Tadashi Kawashima