Patents by Inventor Tadashi Ono

Tadashi Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10971666
    Abstract: A method includes mounting a light emitting device on a board having electrodes on its surface, disposing a resin sheet containing a light conversion material so as to face the surface of the board and filling a space between the resin sheet and the board with a first light transmissive resin, covering a surface of the resin sheet opposite to a surface of the resin sheet covered with the first light transmissive resin, with a second light transmissive resin, forming a groove extending from a top surface of the second light transmissive resin to the board, filling the groove with light reflective resin and covering the top surface of the second light transmissive resin with the light reflective resin, removing the light reflective resin, and dicing the light emitting device by cutting along the light reflective resin.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: April 6, 2021
    Assignee: MITSUMI ELECTRIC CO., LTD.
    Inventors: Makoto Kitazume, Tadashi Ono, Toshiki Komiyama, Yuki Inugai
  • Patent number: 10714360
    Abstract: A method for manufacturing a module including N layers of stacked resin is provided, wherein N is a natural number of two or more. In the method, resin of a first layer is cured to a degree that does not fully harden the resin of the first layer. Resin of a Mth layer is stacked on resin of a (M?1)th layer, wherein M is a natural number of two or more and less than N. The resin of the Mth layer is cured to a degree that does not fully harden the resin of the Mth layer. Stacking the resin of the Mth layer and curing the resin of the Mth layer are repeated. Then, resin of Nth layer is stacked, and all of the N layers of stacked resin are fully hardened.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: July 14, 2020
    Assignee: MINEBEA MITSUMI Inc.
    Inventors: Tadashi Ono, Makoto Kitazume
  • Publication number: 20200143118
    Abstract: A card device according to an aspect of the present disclosure includes: a first interface that connects the card device with a host device. The card device notifies, through the first interface, the host device of whether or not the card device includes a second interface different from the first interface.
    Type: Application
    Filed: January 9, 2020
    Publication date: May 7, 2020
    Inventors: Yoshihisa INAGAKI, Tadashi ONO, Isao KATO
  • Publication number: 20200034321
    Abstract: A host device is connected to either a first slave device supporting a first interface or a second slave device supporting a second interface that is different from the first interface. The host device includes an I/F controller that initializes the first interface to a first device connected to the host device, and determines whether or not the first device is the second slave device when the first interface is successfully initialized, and a host-device I/F unit that initializes the second interface if the first device is the second slave device, and continues the initialization of the first interface if the first device is not the second slave device.
    Type: Application
    Filed: October 3, 2019
    Publication date: January 30, 2020
    Inventor: Tadashi ONO
  • Publication number: 20190355887
    Abstract: A method for manufacturing an optical module includes a step of mounting a light emitting device on a board having a plurality of electrodes on its surface in a facedown manner, a step of disposing a resin sheet containing a light conversion material so as to face the surface on which the light emitting device is mounted of the board and filling a space between the resin sheet and the board including the resin sheet and the light emitting device with a first light transmissive resin, a step of covering a surface opposite to a surface of the resin sheet covered with the first light transmissive resin with a second light transmissive resin, a step of forming a groove extending from a top surface of the second light transmissive resin to a predetermined depth of the board, a step of filling the groove with the light reflective resin and covering the top surface of the second light transmissive resin with the light reflective resin, a step of removing the light reflective resin on the second light transmissive re
    Type: Application
    Filed: February 28, 2018
    Publication date: November 21, 2019
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventors: Makoto KITAZUME, Tadashi ONO, Toshiki KOMIYAMA, Yuki INUGAI
  • Publication number: 20190304806
    Abstract: A method for manufacturing a module including N layers of stacked resin is provided, wherein N is a natural number of two or more. In the method, resin of a first layer is cured to a degree that does not fully harden the resin of the first layer. Resin of a Mth layer is stacked on resin of a (M?1)th layer, wherein M is a natural number of two or more and less than N. The resin of the Mth layer is cured to a degree that does not fully harden the resin of the Mth layer. Stacking the resin of the Mth layer and curing the resin of the Mth layer are repeated. Then, resin of Nth layer is stacked, and all of the N layers of stacked resin are fully hardened.
    Type: Application
    Filed: March 19, 2019
    Publication date: October 3, 2019
    Applicant: MINEBEA MITSUMI Inc.
    Inventors: Tadashi ONO, Makoto KITAZUME
  • Publication number: 20190275711
    Abstract: A method for manufacturing a phosphor sheet is provided. In the method, a particulate phosphor and a particulate transparent medium are mixed to a first light transmissive resin in a liquid state. The first light transmissive resin containing the phosphor and the transparent medium in the liquid state is supplied into a lower mold of a mold, and the mold is closed. The first light transmissive resin containing the phosphor and the transparent medium in the liquid state is changed to a solid state having a predetermined thickness by applying a heat and a pressure to the first light transmissive resin containing the phosphor and the transparent medium in the liquid state.
    Type: Application
    Filed: February 22, 2019
    Publication date: September 12, 2019
    Applicant: MINEBEA MITSUMI Inc.
    Inventors: Tadashi ONO, Makoto KITAZUME
  • Patent number: 10339083
    Abstract: In a removable system formed from a host device and a slave device detachable from the host device, when the slave device sequentially detects a signal of a first voltage level and a signal of a second voltage level from the connected host device, the signal of the first voltage level is transmitted by a second signal line. Subsequently, when the host device detects that the second signal line is at the first voltage level, the host device interrupts drive of a first signal line, and executes initialization.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: July 2, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tadashi Ono, Tatsuya Adachi
  • Publication number: 20190081028
    Abstract: An optical module includes a wiring substrate; an optical element mounted on the wiring substrate; a first light-transmitting body mounted on an upper surface of the optical element; and a light-shielding resin covering the optical element and a side surface portion of the first light-transmitting body, wherein the light-shielding resin includes filler, an upper surface of the light-shielding resin is a ground surface, and a ground surface of the filler is exposed on the upper surface of the light-shielding resin.
    Type: Application
    Filed: May 1, 2017
    Publication date: March 14, 2019
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventors: Toshiki KOMIYAMA, Makoto KITAZUME, Tadashi ONO, Yuki INUGAI
  • Patent number: 10055356
    Abstract: Provided is a memory device with improved memory region usage efficiency. The memory device includes flash memory including: a control information (FAT) region that stores FAT for a file and a user data (UD) region that stores UD; cache memory including a FAT cache region that stores all or part of the FAT; an I/F that receives a write command for writing one of the FAT and the UD; and a memory controller that determines whether write data to be written is the FAT or the UD based on an address included in the write command, and sets the size of the FAT cache region based on an update frequency or an update count for the address included in the write command for the write data determined to be the FAT by the determiner.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: August 21, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Tadashi Ono
  • Publication number: 20170192919
    Abstract: In a removable system formed from a host device and a slave device detachable from the host device, when the slave device sequentially detects a signal of a first voltage level and a signal of a second voltage level from the connected host device, the signal of the first voltage level is transmitted by a second signal line. Subsequently, when the host device detects that the second signal line is at the first voltage level, the host device interrupts drive of a first signal line, and executes initialization.
    Type: Application
    Filed: January 4, 2017
    Publication date: July 6, 2017
    Inventors: Tadashi ONO, Tatsuya ADACHI
  • Publication number: 20170177239
    Abstract: Provided is a memory device with improved memory region usage efficiency. The memory device includes flash memory including: a control information (FAT) region that stores FAT for a file and a user data (UD) region that stores UD; cache memory including a FAT cache region that stores all or part of the FAT; an I/F that receives a write command for writing one of the FAT and the UD; and a memory controller that determines whether write data to be written is the FAT or the UD based on an address included in the write command, and sets the size of the FAT cache region based on an update frequency or an update count for the address included in the write command for the write data determined to be the FAT by the determiner.
    Type: Application
    Filed: March 7, 2017
    Publication date: June 22, 2017
    Inventor: Tadashi ONO
  • Patent number: 9224919
    Abstract: According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. A plurality of protrusions and a plurality of recesses are provided at the first side. Peaks of the protrusions are positioned closer to the second side than an end on the second insulating film side of the optical layer at the outer periphery.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: December 29, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Fujimura, Hironori Yamasaki, Tadashi Ono, Shinsaku Kubo, Shinji Nunotani
  • Publication number: 20150280066
    Abstract: According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. A plurality of protrusions and a plurality of recesses are provided at the first side. Peaks of the protrusions are positioned closer to the second side than an end on the second insulating film side of the optical layer at the outer periphery.
    Type: Application
    Filed: September 9, 2014
    Publication date: October 1, 2015
    Inventors: Kazuo Fujimura, Hironori Yamasaki, Tadashi Ono, Shinsaku Kubo, Shinji Nunotani
  • Patent number: 8661186
    Abstract: An access device 100 includes an access speed information part 112 for informing an access speed required for data recording by the access device 100 to a nonvolatile memory device 200. The nonvolatile memory device includes an access condition determination part 212 for determining an access condition required for meeting the informed access speed and an access area determination unit 213 for determining an access area according to the determined access condition. The access device 100 informs the required access speed to the nonvolatile memory device 200 in advance so that the access condition determination part 212 and the access area determination part 213 in the nonvolatile memory device 200 realize data recording which meets the access speed informed in advance upon the data recording. Thus, it is possible to access all the nonvolatile memory devices at a desired speed regardless of difference in characteristics of the recording speed of each of the nonvolatile memory devices.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: February 25, 2014
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Toshiyuki Honda, Masahiro Nakanishi, Tadashi Ono, Tatsuya Adachi, Isao Kato
  • Patent number: 8650430
    Abstract: In a communication system in which data is transmitted and received in synchronization with a clock signal, a peripheral device cannot transfer data to a host device when the host device stops outputting the clock signal and thus the peripheral device cannot promptly transmit an interrupt request to the host device. A peripheral device transmits an interrupt request to a host device using a signal line for a clock signal when the clock signal output has been stopped. The host device receives the interrupt request, and resumes outputting a clock signal to enable data transmission and reception to and from the peripheral device. This enables the peripheral device to transmit an interrupt request to the host device promptly when the output of the clock signal from the host device has been stopped.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: February 11, 2014
    Assignee: Panasonic Corporation
    Inventors: Masahiro Nakamura, Tadashi Ono, Isao Kato
  • Patent number: 8520563
    Abstract: A host device and a slave device are set to a full-duplex mode by temporarily switching the communication direction of a first transmission channel or a second transmission channel after completing transmission and reception of a predetermined number of data packets in the half-duplex mode. The host device or the slave device can thus transmit an interrupt request, such as a request associated with a wait status or a busy status, to its communication target using the temporary full-duplex mode. This enables the host device or the slave device to process such an interrupt request during high-speed data transfer performed in the half-duplex mode.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: August 27, 2013
    Assignee: Panasonic Corporation
    Inventors: Tadashi Ono, Isao Kato, Hideyuki Yamada, Shinichiro Nishioka, Hiroshi Suenaga, Tsutomu Sekibe
  • Patent number: 8464020
    Abstract: In a memory system including a host device and one or more nonvolatile memory devices, the host device reads, from a nonvolatile memory device connected in the system, a boot code used to operate a CPU of the host device before the CPU is activated. The boot code reading process is required to be performed with a simple method. A host device (2) transmits a first symbol including a synchronous code to a nonvolatile memory device (1). The nonvolatile memory device (1) receives the first symbol from the host device (2), and transmits a first symbol that is identical to the received first symbol to the host device (2), and then transmits a boot code to the host device (2). In this manner, the host device (2) reads a boot code from the nonvolatile memory device 1 with a simple method.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: June 11, 2013
    Assignee: Panasonic Corporation
    Inventors: Masayuki Toyama, Tadashi Ono, Shinichiro Nishioka
  • Patent number: 8452915
    Abstract: Without corresponding to different address spaces between an access device and a nonvolatile memory device, the access device designates a file ID to manage a data storing state only in a physical address space in the nonvolatile memory device. The access device sends the nonvolatile memory device a transfer rate through a transfer rate transmitting unit. A filling-up rate calculating unit calculates a filling-up rate of a physical block corresponding to an assurance speed required by the access device. A remaining amount corresponding to the transfer rate is sought by using the calculated filling-up rate and is transmitted to a remaining amount receiving unit of the access device.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: May 28, 2013
    Assignee: Panasonic Corporation
    Inventors: Tadashi Ono, Tatsuya Adachi, Masahiro Nakanishi, Takuji Maeda
  • Patent number: 8351356
    Abstract: A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: January 8, 2013
    Assignee: Panasonic Corporation
    Inventors: Shinichiro Nishioka, Hiroshi Suenaga, Tsutomu Sekibe, Isao Kato, Tadashi Ono, Hideyuki Yamada