Patents by Inventor Tadashi Ono
Tadashi Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20170177239Abstract: Provided is a memory device with improved memory region usage efficiency. The memory device includes flash memory including: a control information (FAT) region that stores FAT for a file and a user data (UD) region that stores UD; cache memory including a FAT cache region that stores all or part of the FAT; an I/F that receives a write command for writing one of the FAT and the UD; and a memory controller that determines whether write data to be written is the FAT or the UD based on an address included in the write command, and sets the size of the FAT cache region based on an update frequency or an update count for the address included in the write command for the write data determined to be the FAT by the determiner.Type: ApplicationFiled: March 7, 2017Publication date: June 22, 2017Inventor: Tadashi ONO
-
Patent number: 9224919Abstract: According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. A plurality of protrusions and a plurality of recesses are provided at the first side. Peaks of the protrusions are positioned closer to the second side than an end on the second insulating film side of the optical layer at the outer periphery.Type: GrantFiled: September 9, 2014Date of Patent: December 29, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kazuo Fujimura, Hironori Yamasaki, Tadashi Ono, Shinsaku Kubo, Shinji Nunotani
-
Publication number: 20150280066Abstract: According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. A plurality of protrusions and a plurality of recesses are provided at the first side. Peaks of the protrusions are positioned closer to the second side than an end on the second insulating film side of the optical layer at the outer periphery.Type: ApplicationFiled: September 9, 2014Publication date: October 1, 2015Inventors: Kazuo Fujimura, Hironori Yamasaki, Tadashi Ono, Shinsaku Kubo, Shinji Nunotani
-
Patent number: 8661186Abstract: An access device 100 includes an access speed information part 112 for informing an access speed required for data recording by the access device 100 to a nonvolatile memory device 200. The nonvolatile memory device includes an access condition determination part 212 for determining an access condition required for meeting the informed access speed and an access area determination unit 213 for determining an access area according to the determined access condition. The access device 100 informs the required access speed to the nonvolatile memory device 200 in advance so that the access condition determination part 212 and the access area determination part 213 in the nonvolatile memory device 200 realize data recording which meets the access speed informed in advance upon the data recording. Thus, it is possible to access all the nonvolatile memory devices at a desired speed regardless of difference in characteristics of the recording speed of each of the nonvolatile memory devices.Type: GrantFiled: July 26, 2007Date of Patent: February 25, 2014Assignee: Panasonic CorporationInventors: Takuji Maeda, Toshiyuki Honda, Masahiro Nakanishi, Tadashi Ono, Tatsuya Adachi, Isao Kato
-
Patent number: 8650430Abstract: In a communication system in which data is transmitted and received in synchronization with a clock signal, a peripheral device cannot transfer data to a host device when the host device stops outputting the clock signal and thus the peripheral device cannot promptly transmit an interrupt request to the host device. A peripheral device transmits an interrupt request to a host device using a signal line for a clock signal when the clock signal output has been stopped. The host device receives the interrupt request, and resumes outputting a clock signal to enable data transmission and reception to and from the peripheral device. This enables the peripheral device to transmit an interrupt request to the host device promptly when the output of the clock signal from the host device has been stopped.Type: GrantFiled: July 12, 2011Date of Patent: February 11, 2014Assignee: Panasonic CorporationInventors: Masahiro Nakamura, Tadashi Ono, Isao Kato
-
Patent number: 8520563Abstract: A host device and a slave device are set to a full-duplex mode by temporarily switching the communication direction of a first transmission channel or a second transmission channel after completing transmission and reception of a predetermined number of data packets in the half-duplex mode. The host device or the slave device can thus transmit an interrupt request, such as a request associated with a wait status or a busy status, to its communication target using the temporary full-duplex mode. This enables the host device or the slave device to process such an interrupt request during high-speed data transfer performed in the half-duplex mode.Type: GrantFiled: May 29, 2009Date of Patent: August 27, 2013Assignee: Panasonic CorporationInventors: Tadashi Ono, Isao Kato, Hideyuki Yamada, Shinichiro Nishioka, Hiroshi Suenaga, Tsutomu Sekibe
-
Patent number: 8464020Abstract: In a memory system including a host device and one or more nonvolatile memory devices, the host device reads, from a nonvolatile memory device connected in the system, a boot code used to operate a CPU of the host device before the CPU is activated. The boot code reading process is required to be performed with a simple method. A host device (2) transmits a first symbol including a synchronous code to a nonvolatile memory device (1). The nonvolatile memory device (1) receives the first symbol from the host device (2), and transmits a first symbol that is identical to the received first symbol to the host device (2), and then transmits a boot code to the host device (2). In this manner, the host device (2) reads a boot code from the nonvolatile memory device 1 with a simple method.Type: GrantFiled: December 1, 2010Date of Patent: June 11, 2013Assignee: Panasonic CorporationInventors: Masayuki Toyama, Tadashi Ono, Shinichiro Nishioka
-
Patent number: 8452915Abstract: Without corresponding to different address spaces between an access device and a nonvolatile memory device, the access device designates a file ID to manage a data storing state only in a physical address space in the nonvolatile memory device. The access device sends the nonvolatile memory device a transfer rate through a transfer rate transmitting unit. A filling-up rate calculating unit calculates a filling-up rate of a physical block corresponding to an assurance speed required by the access device. A remaining amount corresponding to the transfer rate is sought by using the calculated filling-up rate and is transmitted to a remaining amount receiving unit of the access device.Type: GrantFiled: December 29, 2011Date of Patent: May 28, 2013Assignee: Panasonic CorporationInventors: Tadashi Ono, Tatsuya Adachi, Masahiro Nakanishi, Takuji Maeda
-
Patent number: 8351356Abstract: A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.Type: GrantFiled: June 11, 2009Date of Patent: January 8, 2013Assignee: Panasonic CorporationInventors: Shinichiro Nishioka, Hiroshi Suenaga, Tsutomu Sekibe, Isao Kato, Tadashi Ono, Hideyuki Yamada
-
Publication number: 20120102264Abstract: Without corresponding to different address spaces between an access device and a nonvolatile memory device, the access device designates a file ID to manage a data storing state only in a physical address space in the nonvolatile memory device. The access device sends the nonvolatile memory device a transfer rate through a transfer rate transmitting unit. A filling-up rate calculating unit calculates a filling-up rate of a physical block corresponding to an assurance speed required by the access device. A remaining amount corresponding to the transfer rate is sought by using the calculated filling-up rate and is transmitted to a remaining amount receiving unit of the access device.Type: ApplicationFiled: December 29, 2011Publication date: April 26, 2012Applicant: PANASONIC CORPORATIONInventors: Tadashi ONO, Tatsuya ADACHI, Masahiro NAKANISHI, Takuji MAEDA
-
Patent number: 8166231Abstract: The access device 100 designates a file ID without relating different address spaces of an access device 100 and a nonvolatile memory device 200 with each other and manages a data storing state only in a physical address space in the nonvolatile memory device 200. The access device 100 sends a transfer rate to the nonvolatile memory device 200 by using a transfer rate sending part 121. A filling rate calculation part 251 calculates a filling rate of physical block corresponding to a guaranteed speed required by the access device 100. A remaining capacity corresponding to the transfer rate is obtained by using the calculated filling rate and is sent to a remaining capacity receiving part 122 of the access device 100.Type: GrantFiled: August 7, 2007Date of Patent: April 24, 2012Assignee: Panasonic CorporationInventors: Tadashi Ono, Tatsuya Adachi, Masahiro Nakanishi, Takuji Maeda
-
Publication number: 20120023358Abstract: In a communication system in which data is transmitted and received in synchronization with a clock signal, a peripheral device cannot transfer data to a host device when the host device stops outputting the clock signal and thus the peripheral device cannot promptly transmit an interrupt request to the host device. A peripheral device transmits an interrupt request to a host device using a signal line for a clock signal when the clock signal output has been stopped. The host device receives the interrupt request, and resumes outputting a clock signal to enable data transmission and reception to and from the peripheral device. This enables the peripheral device to transmit an interrupt request to the host device promptly when the output of the clock signal from the host device has been stopped.Type: ApplicationFiled: July 12, 2011Publication date: January 26, 2012Applicant: PANASONIC CORPORATIONInventors: Masahiro NAKAMURA, Tadashi ONO, Isao KATO
-
Publication number: 20110276748Abstract: In a memory system including a host device and one or more nonvolatile memory devices, the host device reads, from a nonvolatile memory device connected in the system, a boot code used to operate a CPU of the host device before the CPU is activated. The boot code reading process is required to be performed with a simple method. A host device (2) transmits a first symbol including a synchronous code to a nonvolatile memory device (1). The nonvolatile memory device (1) receives the first symbol from the host device (2), and transmits a first symbol that is identical to the received first symbol to the host device (2), and then transmits a boot code to the host device (2). In this manner, the host device (2) reads a boot code from the nonvolatile memory device 1 with a simple method.Type: ApplicationFiled: December 1, 2010Publication date: November 10, 2011Applicant: PANASONIC CORPORATIONInventors: Masayuki Toyama, Tadashi Ono, Shinichiro Nishioka
-
Publication number: 20110182216Abstract: An interrupt request cannot be transmitted while a data read command or a data write command transmitted from a host device to a slave device is being processed in a half-duplex mode. Disclosed are a host device and a slave device that are set to a full-duplex mode by temporarily switching the communication direction of a first transmission channel or a second transmission channel after completing transmission and reception of a predetermined number of data packets in the half-duplex mode. The host device or the slave device can thus transmit an interrupt request, such as a request associated with a wait status or a busy status, to its communication target using the temporary full-duplex mode. This enables the host device or the slave device to process such an interrupt request during high-speed data transfer performed in the half-duplex mode.Type: ApplicationFiled: May 29, 2009Publication date: July 28, 2011Inventors: Tadashi Ono, Isao Kato, Hideyuki Yamada, Shinichiro Nishioka, Hiroshi Suenaga, Tsutomu Sekibe
-
Publication number: 20110103224Abstract: A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.Type: ApplicationFiled: June 11, 2009Publication date: May 5, 2011Inventors: Shinichiro Nishioka, Hiroshi Suenaga, Tsutomu Sekibe, Isao Kato, Tadashi Ono, Hideyuki Yamada
-
Patent number: 7925753Abstract: In a normal operation state, a connection management section writes data transmitted from a first processing section to a data temporary storage section and reads data to be received by a second processing section from the data temporary storage section. Upon receiving control signals which instruct a change of the subject of processing, the first processing section and the second processing section output a transmitting-end clear request and a receiving-end clear request, respectively. The connection management section reads data from the empty data storage section after a transmitting-end clear request is received and until a receiving-end clear request is received, and writes data to the empty data storage section after a receiving-end clear request is received and until a transmitting-end clear request is received.Type: GrantFiled: March 30, 2009Date of Patent: April 12, 2011Assignee: Panasonic CorporationInventors: Satoshi Inami, Shigenori Maeda, Akihiro Miyazaki, Tadashi Ono, Fukutaro Sekine, Joerg Vogler, Gerald Pfeiffer, Toshimasa Takaki
-
Patent number: 7885502Abstract: A disclosed waveguide film cable includes a waveguide formed on a film. The waveguide film cable includes a coating film made of a material having a Young's modulus smaller than or equal to the Young's modulus of a material that forms the film and/or the waveguide and coats partially or entirely the film and/or the waveguide.Type: GrantFiled: April 20, 2006Date of Patent: February 8, 2011Assignee: Mitsumi Electric Co., Ltd.Inventor: Tadashi Ono
-
Publication number: 20100142901Abstract: A disclosed waveguide film cable includes a waveguide formed on a film. The waveguide film cable includes a coating film made of a material having a Young's modulus smaller than or equal to the Young's modulus of a material that forms the film and/or the waveguide and coats partially or entirely the film and/or the waveguide.Type: ApplicationFiled: April 20, 2006Publication date: June 10, 2010Applicant: MITSUMI ELECTRIC CO., LTD.Inventor: Tadashi Ono
-
Publication number: 20100115185Abstract: Without corresponding to different address spaces between an access device (100) and a nonvolatile memory device (200), the access device (100) designates a file ID to manage a data storing state only in a physical address space in the nonvolatile memory device (200). The access device (100) sends the nonvolatile memory device (200) a transfer rate through a transfer rate transmitting unit (121). A filling-up rate calculating unit (251) calculates a filling-up rate of a physical block corresponding to an assurance speed required by the access device (100). A remaining amount corresponding to the transfer rate is sought by using the calculated rate and is transmitted to a remaining amount receiving unit (122) of the access device (100).Type: ApplicationFiled: August 7, 2007Publication date: May 6, 2010Applicant: PANASONIC CORPORATIONInventors: Tadashi Ono, Tatsuya Adachi, Masahiro Nakanishi, Takuji Maeda
-
Publication number: 20100017560Abstract: It has been difficult for an access device to obtain a remaining capacity of a memory from a nonvolatile memory device having a plurality of interfaces. A capacity parameter generation part 127 and a capacitor parameter notification part 128 are provided in a memory controller 120. When data is written or deleted, the capacity parameter generation part 127 generates a capacity parameter based on a physical region management table 125. The capacity parameter notification part 128 sends the generated capacity parameter to an access device 200. The access device 200 obtains a remaining capacity of the nonvolatile memory device 100 from the received capacity parameter.Type: ApplicationFiled: September 11, 2007Publication date: January 21, 2010Applicant: PANASONIC CORPORATIONInventors: Tadashi Ono, Masahiro Nakanishi, Isao Kato