Patents by Inventor Tadateru YAMADA

Tadateru YAMADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11688560
    Abstract: A supporting-terminal-equipped capacitor chip includes a capacitor chip, and first and second supporting terminals that are electrically conductive and hold the capacitor chip therebetween. A portion of the capacitor chip other than a first connection portion and the first supporting terminal are separated from each other. A portion of the capacitor chip other than a second connection portion and the second supporting terminal are separated from each other. The first connection portion is located on the first main surface adjacent to a first end surface. The second connection portion is located on the first main surface adjacent to a second end surface.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: June 27, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinobu Chikuma, Tadateru Yamada
  • Patent number: 11317541
    Abstract: An electronic component module includes a second terminal electrode that is independent of a first terminal electrode in terms of potential. A second electronic component is mounted on a board, with a first surface thereof facing the board. A heat transfer portion is disposed on a second surface of the second electronic component, the heat transfer portion being connected to both the first terminal electrode and the second terminal electrode. A heat dissipation portion is connected to the board via the first terminal electrode, the second terminal electrode, and the heat transfer portion.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: April 26, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinichiro Kuroiwa, Yukihiro Fujita, Tadateru Yamada
  • Publication number: 20210125785
    Abstract: A supporting-terminal-equipped capacitor chip includes a capacitor chip, and first and second supporting terminals that are electrically conductive and hold the capacitor chip therebetween. A portion of the capacitor chip other than a first connection portion and the first supporting terminal are separated from each other. A portion of the capacitor chip other than a second connection portion and the second supporting terminal are separated from each other. The first connection portion is located on the first main surface adjacent to a first end surface. The second connection portion is located on the first main surface adjacent to a second end surface.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 29, 2021
    Inventors: Shinobu CHIKUMA, Tadateru YAMADA
  • Publication number: 20200413570
    Abstract: An electronic component module includes a second terminal electrode that is independent of a first terminal electrode in terms of potential. A second electronic component is mounted on a board, with a first surface thereof facing the board. A heat transfer portion is disposed on a second surface of the second electronic component, the heat transfer portion being connected to both the first terminal electrode and the second terminal electrode. A heat dissipation portion is connected to the board via the first terminal electrode, the second terminal electrode, and the heat transfer portion.
    Type: Application
    Filed: June 23, 2020
    Publication date: December 31, 2020
    Inventors: Shinichiro KUROIWA, Yukihiro FUJITA, Tadateru YAMADA
  • Patent number: 10510489
    Abstract: A mounting structure includes a circuit board including one principal surface on which a multilayer capacitor is mounted. The circuit board includes a first insulating layer, and a second insulating layer having a Young's modulus smaller than that of the first insulating layer. The second insulating layer is closer to the one principal surface than the first insulating layer. A multilayer capacitor built-in substrate includes a circuit board, a multilayer capacitor on one principal surface of the circuit board, and a resin layer on the one principal surface of the circuit board and embedding the multilayer capacitor. The circuit board includes a first insulating layer, and a second insulating layer having a Young's modulus smaller than that of the first insulating layer. The second insulating layer is closer to the one principal surface than the first insulating layer.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: December 17, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tadateru Yamada, Isamu Fujimoto, Kazuo Hattori, Masaru Takahashi
  • Patent number: 10468191
    Abstract: A multilayer ceramic capacitor includes a stacked body and first and second external electrodes. When a dimension of the stacked body in a length direction is L0, a dimension of the stacked body in a width direction is W0, a dimension of the stacked body in a stacking direction is T0, a dimension of the first outer layer portion in the stacking direction is T1, a dimension of the second outer layer portion in the stacking direction is T2, a dimension of the first side margin in the width direction is W1, a dimension of the second side margin in the width direction is W2, a dimension of the first end margin in the length direction is L1, and a dimension of the second end margin in the length direction is L2, conditions of (L1+L2)/L0>(W1+W2)/W0 and (L1+L2)/L0>(T1+T2)/T0 are satisfied, and a condition of 0.244?(L1+L2)/L0?0.348 is satisfied.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: November 5, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tadateru Yamada, Kazuo Hattori, Isamu Fujimoto
  • Patent number: 10312025
    Abstract: A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: June 4, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukihiro Fujita, Tadateru Yamada
  • Publication number: 20190035557
    Abstract: A mounting structure includes a circuit board including one principal surface on which a multilayer capacitor is mounted. The circuit board includes a first insulating layer, and a second insulating layer having a Young's modulus smaller than that of the first insulating layer. The second insulating layer is closer to the one principal surface than the first insulating layer. A multilayer capacitor built-in substrate includes a circuit board, a multilayer capacitor on one principal surface of the circuit board, and a resin layer on the one principal surface of the circuit board and embedding the multilayer capacitor. The circuit board includes a first insulating layer, and a second insulating layer having a Young's modulus smaller than that of the first insulating layer. The second insulating layer is closer to the one principal surface than the first insulating layer.
    Type: Application
    Filed: September 18, 2018
    Publication date: January 31, 2019
    Inventors: Tadateru YAMADA, Isamu FUJIMOTO, Kazuo HATTORI, Masaru TAKAHASHI
  • Publication number: 20190037696
    Abstract: A multilayer capacitor built-in substrate includes a circuit board, a multilayer capacitor mounted on one principal surface of the circuit board, a first resin layer provided on the one principal surface of the circuit board, and a second resin layer provided on the first resin layer and embedding the multilayer capacitor. The Young's modulus of the first resin layer is smaller than that of the second resin layer.
    Type: Application
    Filed: September 18, 2018
    Publication date: January 31, 2019
    Inventors: Tadateru YAMADA, Masaru TAKAHASHI, Isamu FUJIMOTO, Kazuo HATTORI
  • Publication number: 20180358179
    Abstract: A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B.
    Type: Application
    Filed: August 17, 2018
    Publication date: December 13, 2018
    Inventors: Yukihiro FUJITA, Tadateru YAMADA
  • Patent number: 10115526
    Abstract: In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t1, a dimension along the thickness direction of a second region that is positioned on the side of a first main surface relative to the first region is t2, and a dimension along the thickness direction of a third region that is positioned on the side of a second main surface relative to the first region is t3. A condition of t2/t1>about 0.15 and a condition of t3/t1>about 0.15 are satisfied.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: October 30, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tadateru Yamada
  • Patent number: 10090109
    Abstract: A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: October 2, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukihiro Fujita, Tadateru Yamada
  • Publication number: 20180197682
    Abstract: A multilayer ceramic capacitor includes a stacked body and first and second external electrodes. When a dimension of the stacked body in a length direction is L0, a dimension of the stacked body in a width direction is W0, a dimension of the stacked body in a stacking direction is T0, a dimension of the first outer layer portion in the stacking direction is T1, a dimension of the second outer layer portion in the stacking direction is T2, a dimension of the first side margin in the width direction is W1, a dimension of the second side margin in the width direction is W2, a dimension of the first end margin in the length direction is L1, and a dimension of the second end margin in the length direction is L2, conditions of (L1+L2)/L0>(W1+W2)/W0 and (L1+L2)/L0>(T1+T2)/T0 are satisfied, and a condition of 0.244?(L1+L2)/L0?0.348 is satisfied.
    Type: Application
    Filed: December 6, 2017
    Publication date: July 12, 2018
    Inventors: Tadateru YAMADA, Kazuo HATTORI, Isamu FUJIMOTO
  • Patent number: 9997295
    Abstract: An electronic component includes an electronic element including two outer electrodes on surfaces thereof and a board terminal including a board main body and two mounting electrodes. The board main body has electrical insulating properties and a first principal surface. The two mounting electrodes are disposed on the first principal surface and electrically coupled to the two outer electrodes, respectively. The electronic element is mounted on the first principal surface side. The two outer electrodes are partially disposed outside an outer edge of the board terminal when viewed from the first principal surface side. The height from an end of each of the two outer electrodes opposite the board terminal to an end of the board terminal opposite the electronic element is not greater than a larger dimension of the width of the electronic element and the width of the board terminal.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: June 12, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukihiro Fujita, Tadateru Yamada, Hirobumi Adachi
  • Patent number: 9984829
    Abstract: In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t1, a dimension along the thickness direction of a second region that is positioned on the side of a first main surface relative to the first region is t2, and a dimension along the thickness direction of a third region that is positioned on the side of a second main surface relative to the first region is t3. A condition of t2/t1>about 0.15 and a condition of t3/t1>about 0.15 are satisfied.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: May 29, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tadateru Yamada
  • Publication number: 20180061579
    Abstract: In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t1, a dimension along the thickness direction of a second region that is positioned on the side of a first main surface relative to the first region is t2, and a dimension along the thickness direction of a third region that is positioned on the side of a second main surface relative to the first region is t3. A condition of t2/t1>about 0.15 and a condition of t3/t1>about 0.15 are satisfied.
    Type: Application
    Filed: October 25, 2017
    Publication date: March 1, 2018
    Inventor: Tadateru YAMADA
  • Publication number: 20180061580
    Abstract: A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B.
    Type: Application
    Filed: October 25, 2017
    Publication date: March 1, 2018
    Inventors: Yukihiro FUJITA, Tadateru YAMADA
  • Publication number: 20170345575
    Abstract: In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t1, a dimension along the thickness direction of a second region that is positioned on the side of a first main surface relative to the first region is t2, and a dimension along the thickness direction of a third region that is positioned on the side of a second main surface relative to the first region is t3. A condition of t2/t1>about 0.15 and a condition of t3/t1>about 0.15 are satisfied.
    Type: Application
    Filed: August 16, 2017
    Publication date: November 30, 2017
    Inventor: Tadateru YAMADA
  • Patent number: 9818544
    Abstract: A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: November 14, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukihiro Fujita, Tadateru Yamada
  • Patent number: 9754722
    Abstract: In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t1, a dimension along the thickness direction of a second region that is positioned on the side of a first main surface relative to the first region is t2, and a dimension along the thickness direction of a third region that is positioned on the side of a second main surface relative to the first region is t3. A condition of t2/t1>about 0.15 and a condition of t3/t1>about 0.15 are satisfied.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: September 5, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tadateru Yamada