Patents by Inventor Tadayoshi Kosaka

Tadayoshi Kosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6888310
    Abstract: A plasma display panel includes a dielectric layer in which a filler for enhancing reflectance is dispersed. To increase luminescence efficiency, the filler consists of flakes oriented in parallel to the surface of the dielectric layer.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: May 3, 2005
    Assignee: Fujitsu Limited
    Inventors: Shinji Tadaki, Noriyuki Awaji, Fumihiro Namiki, Katsuya Irie, Hideki Harada, Tadayoshi Kosaka
  • Publication number: 20050073476
    Abstract: The present method is to drive a plasma display panel which displays a frame composed of a plurality of sub-fields having different weights of luminance. The method comprises using plural kinds of application voltage waveforms different in light emission luminance, as pulse voltages for sustain discharges in display of each sub-field, and adjusting the number of waves in each of the plural kinds of application voltage waveforms according to the weight of luminance set for each sub-field, thereby performing gradation display.
    Type: Application
    Filed: March 15, 2004
    Publication date: April 7, 2005
    Applicant: Fujitsu Limited
    Inventors: Kazushige Takagi, Tadayoshi Kosaka
  • Patent number: 6855026
    Abstract: A partition is formed by the process including a step for providing a sheet-like partition material that covers a display area and outside thereof on the surface of the substrate, a step for providing a mask for patterning that covers the display area and the outside thereof, so that a pattern of the portion arranged outside of the display area of the mask is a grid-like pattern, a step for patterning the partition material covered partially with the mask by a sandblasting process, and a step for baking the partition material after the patterning.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: February 15, 2005
    Assignees: Fujitsu Limited, Fujitsu Hitachi Plasma Display Limited
    Inventors: Akihiro Fujinaga, Kazunori Ishizuka, Tatsutoshi Kanae, Kazuhide Iwasaki, Toshiyuki Nanto, Yoshimi Kawanami, Masayuki Shibata, Yasuhiko Kunii, Tadayoshi Kosaka, Osamu Toyoda, Yoshimi Shirakawa
  • Publication number: 20040085022
    Abstract: According to the present invention, there is provided a gas discharge panel having at least a protective film containing a driving voltage-reducing compound.
    Type: Application
    Filed: September 3, 2003
    Publication date: May 6, 2004
    Applicant: Fujitsu Hitachi Plasma Display Limited
    Inventors: Tadayoshi Kosaka, Souichirou Hidaka
  • Patent number: 6727869
    Abstract: A single data electrodes orthogonal to scan electrodes is arranged so as to be involved to adjacent two rows, where either one side of the data electrode can be addressed by the use of two scan electrodes for a single line, so that the quantity of the data electrodes be reduced to a half resulting in a reduction of reactive power required to charge the capacitance between the adjacent data electrodes.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: April 27, 2004
    Assignee: Fujitsu Limited
    Inventor: Tadayoshi Kosaka
  • Publication number: 20040072493
    Abstract: A partition is formed by the process including a step for providing a sheet-like partition material that covers a display area and outside thereof on the surface of the substrate, a step for providing a mask for patterning that covers the display area and the outside thereof, so that a pattern of the portion arranged outside of the display area of the mask is a grid-like pattern, a step for patterning the partition material covered partially with the mask by a sandblasting process, and a step for baking the partition material after the patterning.
    Type: Application
    Filed: October 8, 2003
    Publication date: April 15, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Akihiro Fujinaga, Kazunori Ishizuka, Tatsutoshi Kanae, Kazuhide Iwasaki, Toshiyuki Nanto, Yoshimi Kawanami, Masayuki Shibata, Yasuhiko Kunii, Tadayoshi Kosaka, Osamu Toyoda, Yoshimi Shirakawa
  • Patent number: 6489722
    Abstract: A plasma display panel is provided in which a reliability of addressing is ensured, a flicker is reduced and the area that a cross talk can spread in the column direction is decreased so that a fluctuation of the display can be reduced. The plasma display panel has a first display electrode and a second display electrode that make an electrode pair for surface discharge. The first and the second display electrodes share one electrode for display of neighboring two rows. A partition is provided that divides a discharge gas space in the column direction only in the area where the first display electrode that is not used as a scanning electrode is positioned.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: December 3, 2002
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Kenji Yoshida, Tadayoshi Kosaka, Takeo Masuda
  • Patent number: 6376986
    Abstract: A plasma display panel is provided that can prevent interference of discharge between rows securely without reducing operation margin. Plural partitions being at a distance from each other define a discharge space of each column in the screen. The column space defined by the partitions is narrowed periodically along the column direction. A surface discharge gap is formed at each enlarging portion of the column space. A pair of plural main electrodes is provided for surface discharge. Each of the main electrodes includes a belt-like bus portion extending in the row direction of the screen and plural gap forming portions protruding in the column direction from the bus portion toward the enlarging portion in each column space.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: April 23, 2002
    Assignee: Fujitsu Limited
    Inventors: Kazushige Takagi, Tadayoshi Kosaka, Fumihiro Namiki
  • Publication number: 20020005844
    Abstract: Undue power consumption is reduced in the capacitance between data electrodes during addressing in a display panel. The power consumption associated with the capacitance is reduced to half as compared with the conventional panel, because the current associated with the discharge of the capacitance is independent of the power supply in the case of a combination of “L reset”, where the capacitance between data electrodes is discharged through a backward current path on the current sink terminal side, and “H reset”, where the capacitance between data electrodes is discharged through a backward current path on the current supply terminal side.
    Type: Application
    Filed: June 7, 2001
    Publication date: January 17, 2002
    Inventors: Tadayoshi Kosaka, Kenji Awamoto, Fumihiro Namiki
  • Publication number: 20010054871
    Abstract: A plasma display panel includes a dielectric layer in which a filler for enhancing reflectance is dispersed. To increase luminescence efficiency, the filler consists of flakes oriented in parallel to the surface of the dielectric layer.
    Type: Application
    Filed: March 28, 2001
    Publication date: December 27, 2001
    Inventors: Shinji Tadaki, Noriyuki Awaji, Fumihiro Namiki, Katsuya Irie, Hideki Harada, Tadayoshi Kosaka
  • Patent number: 6236159
    Abstract: The gas discharge panel according to the present invention includes a pair of substrates, a plurality of barrier ribs, a sealing member, and two gas flow barriers. One of the substrates has a first vent hole and a second vent hole provided in a peripheral portion thereof for intercommunication between the inside and outside of the panel. The at least two gas flow barriers are provided between the sealing member and the barrier ribs located on opposite sides of an arrangement of the barrier ribs so that a gas introduced from the first vent hole flows through inter-rib spaces defined between adjacent pairs of barrier ribs and is expelled from the second vent hole.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: May 22, 2001
    Assignee: Fujitsu Limited
    Inventors: Kazunori Inoue, Fumihiro Namiki, Keiichi Betsui, Shinya Fukuta, Tadayoshi Kosaka
  • Patent number: 6048243
    Abstract: The present invention provides a method of forming a plurality of barrier ribs each having an elongate configuration in plan and extending in the same direction within a display area for fabrication of a display panel. The method comprises the steps of forming a mask for cutting, having a masking pattern corresponding to the plurality of barrier ribs on a rib material layer, and removing portions of the rib material layer by jetting a cutting medium thereto, wherein the masking pattern is configured such that a plurality of elongate portions corresponding to the respective barrier ribs each extend across the display area to the outside of the display area and a spacing between adjacent end portions of elongate portions is smaller than a spacing between adjacent elongate portions within the display area.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: April 11, 2000
    Assignee: Fujitsu Limited
    Inventors: Tadayoshi Kosaka, Fumihiro Namiki, Osamu Toyoda, Keiichi Betsui, Akira Tokai
  • Patent number: 6039622
    Abstract: A method of forming barrier ribs of a display panel includes the steps of forming a layer of a dielectric paste containing a powdery component and a binder component as a layer of a barrier rib material in a predetermined thickness on a substrate, forming a mask pattern on the dielectric paste layer, jetting a cutting medium onto the dielectric paste layer through the mask pattern to partially cut the dielectric paste layer to thereby form a cut barrier rib layer, and sintering the cut barrier rib layer to make barrier ribs, wherein, prior to forming the mask pattern, a bind film is formed for fixing the powdery component in a free state on the surface of the dielectric paste layer.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: March 21, 2000
    Assignee: Fujitsu Limited
    Inventors: Tadayoshi Kosaka, Osamu Toyoda, Fumihiro Namiki
  • Patent number: 5967872
    Abstract: A plasma display panel has a matrix of plural first straight electrodes and plural straight second electrodes, respectively crossing each other, and a unit color element located at a crossing point of the first and second electrodes. A plurality of separator walls are spaced apart from each other and extend along the second electrodes, dividing a discharge space into a plurality of channels extending along respective, second electrodes. The separator walls undulate with a fixed periodicity so as to define alternating wide and narrow portions aligned along each channel and the respective first electrode. A fluorescent material is coated in each channel, the colors emitted from the fluorescent material being identical in each channel. A gas discharge takes place selectively at the wide portions in cooperation with the respective first and second electrodes.
    Type: Grant
    Filed: May 14, 1998
    Date of Patent: October 19, 1999
    Assignee: Fujitsu Limited
    Inventors: Keiichi Betsui, Shin'ya Fukuta, Tadayoshi Kosaka, Fumihiro Namiki, Osamu Toyoda, Shigeo Kasahara
  • Patent number: 5825128
    Abstract: A plasma display panel has a matrix of plural first straight electrodes and plural straight second electrodes, respectively crossing each other, and a unit color element located at a crossing point of the first and second electrodes. A plurality of separator walls are spaced apart from each other and extend along the second electrodes, dividing a discharge space into a plurality of channels extending along respective, second electrodes. The separator walls undulate with a fixed periodicity so as to define alternating wide and narrow portions aligned along each channel and the respective first electrode. A fluorescent material is coated in each channel, the colors emitted from the fluorescent material being identical in each channel. A gas discharge takes place selectively at the wide portions in cooperation with the respective first and second electrodes.
    Type: Grant
    Filed: August 9, 1996
    Date of Patent: October 20, 1998
    Assignee: Fujitsu Limited
    Inventors: Keiichi Betsui, Shin'ya Fukuta, Tadayoshi Kosaka, Fumihiro Namiki, Osamu Toyoda, Shigeo Kasahara