Abstract: A display device includes: a pixel circuit layer including a plurality of transistors; first partition wall and a second partition wall on the pixel circuit layer, each of the first and second partition walls having a shape protruding in a thickness direction; a first electrode and a second electrode on the same layer and respectively on the first partition wall and the second partition wall; a light emitting element between the first electrode and the second electrode; and a semiconductor pattern directly on the first electrode.

Abstract: A deep UV light emitting diode includes a substrate, an n-type semiconductor layer located on the substrate, a mesa disposed on the n-type semiconductor layer, and including an active layer and a p-type semiconductor layer, an n-ohmic contact layer in contact with the n-type semiconductor layer, a p-ohmic contact layer in contact with the p-type semiconductor layer, an n-bump electrically connected to the n-ohmic contact layer, and a p-bump electrically connected to the p-ohmic contact layer. The mesa includes a plurality of vias exposing a first conductivity type semiconductor layer.

Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.

Abstract: A display device includes: a first substrate; a second substrate on the first substrate and exposing a first edge portion of the first substrate, the second substrate protruding beyond a second edge portion of the first substrate; a connection line on the first edge portion of the first substrate, the connection line having a first end portion protruding beyond a first side of the second substrate and a second end portion covered by the second substrate; and a thin-film transistor layer on the second substrate and connected to the connection line. The thin-film transistor layer includes signal lines extending from the first side to a second side of the second substrate. The signal lines extend into contact openings in the thin-film transistor layer and are exposed at a lower part of the second substrate on the second side of the second substrate.

Abstract: A Merkle tree-based data management method may comprise: aligning data into two-dimensional square matrix; calculating a hash value of each node of the two-dimensional square matrix; calculating hash values of each row of the two-dimensional square matrix; generating an additional column with nodes having the hash values of each row; calculating hash values of each column of the two-dimensional square matrix; generating an additional row with nodes having hash values of each column; and calculating a Merkle root by concatenating the hash values of the additional column and the hash values of the additional row.

Abstract: The present invention provides a novel allulose epimerase variant in which an amino acid residue present at a specific position of an amino acid sequence of wild-type D-allulose 3-epimerase derived from Flavonifractor plautii is substituted with another amino acid residue, and various uses thereof. The novel allulose epimerase variant according to the present invention has a higher conversion activity of fructose to allulose than that of the wild-type D-allulose 3-epimerase derived from Flavonifractor plautii or a D-allulose epimerase variant W29K/G216S/M234I, and has excellent thermal stability especially under high temperature conditions of 60° C. or higher, thereby preventing contamination during an industrial-scale enzymatic conversion reaction for the mass production of allulose, shortening the production time, and reducing the production costs.

Abstract: The present disclosure may provide a display device and method of fabricating the same. According to one or more embodiments, a display device includes a first substrate including pixel circuit units, a plurality of light-emitting elements on the first substrate, a partition wall filling gaps between the light-emitting elements and providing spaces in emission areas, on the light-emitting elements and wavelength conversion layers in the spaces.

Abstract: A display device includes: a pixel circuit layer including a plurality of transistors; first partition wall and a second partition wall on the pixel circuit layer, each of the first and second partition walls having a shape protruding in a thickness direction; a first electrode and a second electrode on the same layer and respectively on the first partition wall and the second partition wall; a light emitting element between the first electrode and the second electrode; and a semiconductor pattern directly on the first electrode.

Abstract: A display device includes: a first substrate; a second substrate on the first substrate and exposing a first edge portion of the first substrate, the second substrate protruding beyond a second edge portion of the first substrate; a connection line on the first edge portion of the first substrate, the connection line having a first end portion protruding beyond a first side of the second substrate and a second end portion covered by the second substrate; and a thin-film transistor layer on the second substrate and connected to the connection line. The thin-film transistor layer includes signal lines extending from the first side to a second side of the second substrate. The signal lines extend into contact openings in the thin-film transistor layer and are exposed at a lower part of the second substrate on the second side of the second substrate.

Abstract: A display device and a manufacturing method thereof are disclosed. The display device may include a pixel circuit layer including a plurality of transistors, a first partition wall and a second partition wall on the pixel circuit layer, and each protruding in a thickness direction, a first electrode and a second electrode formed on the same layer, and on the first partition wall and the second partition wall, respectively; a light emitting element between the first electrode and the second electrode; and a first organic pattern directly on the light emitting element.

Abstract: A display device and a manufacturing method thereof are disclosed. The display device may include a pixel circuit layer including a plurality of transistors, a first partition wall and a second partition wall on the pixel circuit layer, and each protruding in a thickness direction, a first electrode and a second electrode formed on the same layer, and on the first partition wall and the second partition wall, respectively; a light emitting element between the first electrode and the second electrode; and a first organic pattern directly on the light emitting element.

Abstract: A display device includes: a base layer; a circuit layer provided on the base layer, the circuit layer including pixel circuits and sensor circuits; a pixel element layer provided on the circuit layer, the pixel element layer including light emitting elements respectively connected to the pixel circuits and light receiving elements respectively connected to the sensor circuits; an encapsulation layer covering the pixel element layer; and a touch sensing layer on the encapsulation layer, the touch sensing layer including a conductive pattern forming touch electrodes for sensing a touch. The light emitting elements include light emitting layers, and the light receiving elements include light receiving layers. The conductive pattern includes main patterns respectively surrounding the light receiving layers in a closed form.

Abstract: A light-emitting element includes a first semiconductor layer doped with an n-type dopant, a second semiconductor layer disposed on the first semiconductor layer and doped with a p-type dopant, a light-emitting layer disposed between the first and second semiconductor layers, an electrode layer disposed on the second semiconductor layer, an insulating film surrounding at least an outer surface of the light-emitting layer, and a void formed on the first semiconductor layer, the void extending in a direction in which the first semiconductor layer, the light-emitting layer, and the second semiconductor layer are disposed.

Abstract: The present invention relates to an ultra-thin glass having a thickness (t), characterized in that, when the first surface is defined as a point (t0) with t=0, and the second surface is defined as a point (tt) with t=t, the point (tKmax) at which the concentration of potassium ions (K+) is maximum between t0 and tt satisfies at least one of Equations 1 and 2 below, and the ultra-thin glass has a bend radius of less than 26·t, and a method for manufacturing the same. t0<tKmax?0.5·tt??[Equation 1] 0.5·tt?tKmax<tt.

Abstract: A deep ultraviolet light-emitting diode is provided. A deep ultraviolet light-emitting diode according to one embodiment comprises: a substrate; an n-type semiconductor layer positioned on the substrate; a mesa which is disposed on the n-type semiconductor layer, comprises an active layer and a p-type semiconductor layer, and has a plurality of via-holes exposing the n-type semiconductor layer; n-ohmic contact layers contacting the n-type semiconductor layer in the via-holes; a p-ohmic contact layer contacting the p-type semiconductor layer; an n-pad metal layer electrically connected to the n-ohmic contact layers; a p-pad metal layer electrically connected to the p-ohmic contact layer; an n-bump electrically connected to the n-pad metal layer; and a p-bump electrically connected to the p-pad metal layer, wherein the p-pad metal layer is formed so as to surround the n-pad metal layer.

Abstract: A display device includes a display element layer on a substrate. The display element layer may include first and second electrodes, and light emitting elements electrically coupled to the first and second electrodes. The first electrode may include first protrusions, a first portion located between the first protrusions, a second portion corresponding to a side of each first protrusion, and a third portion coupled between the first portion and a first end of the second portion. The second electrode may include second protrusions that protrude toward the first electrode and are spaced apart from each other in the first direction, a first portion located between the second protrusions, a second portion corresponding to a side of each of the second protrusions, and a third portion coupled between the first portion and a first end of the second portion.

Abstract: An electronic device according to one embodiment of the present disclosure may include: a housing; an optical element unit which may be configured to emit light toward a user's body, receive light reflected from the user's body, and convert the received light into a first signal; an IC element which may be configured to convert the first signal provided from the optical element unit into a second signal, and provide the second signal to a main circuit board disposed in the housing; a first circuit board that may be disposed between the optical element unit and the IC element and may be electrically connected to the optical element unit and the IC element; and a second circuit board that may include at least one first opening in which the IC element is mounted. The housing may include at least one transparent region such that the light generated by the optical element unit is transmitted through the transparent region to an exterior of the housing.

Abstract: Methods and compositions for treating cancer are disclosed. The compositions comprise immune cells pretreated with ponatinib, or immune cells co-administered with ponatinib, where ponatinib promotes survival and anti-cancer cytotoxicity of the immune cells.

Abstract: A UV light emitting diode includes a substrate having a plurality of holes surrounded by a flat surface, a first conductivity type semiconductor layer disposed on the substrate, a second conductivity type semiconductor layer disposed on the first conductivity type semiconductor layer, an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer. A distance from the flat surface to the active layer is smaller than a distance from bottom surfaces of the plurality of holes to the active layer. The flat surface is in contact with the first conductivity type semiconductor layer.

Abstract: Disclosed herein is an amyloid ? accumulation and/or aggregation inhibitor. A technique for inhibiting amyloid ? accumulation and/or aggregation by concurrently introducing Nurr1 and Foxa2 genes and introducing the co-expression of the genes is also provided. When used, the composition can be applied to the prevention or treatment of a neurodegenerative disease caused by amyloid ? accumulation and/or aggregation, such as Alzheimer's disease.