Patents by Inventor Tae H. Kim

Tae H. Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8495537
    Abstract: A method, system or computer usable program product for performing timing analysis on an array circuit including receiving in memory a set of pins to be timed, selecting with a data processor a cross section of the array circuit including the set of pins wherein a backtrace is performed from the set of pins to identify a set of bus groups, each bus group having a plurality of timing pins, and assigning timing for an assigned pin of a first bus group equal to timing calculated for a surrogate pin of the first bus group based on array circuit regularity.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shyamkumar Thoziyoor, Tae H. Kim, Sang Y. Lee
  • Publication number: 20130185685
    Abstract: A method, system or computer usable program product for performing timing analysis on an array circuit including receiving in memory a set of pins to be timed, selecting with a data processor a cross section of the array circuit including the set of pins wherein a backtrace is performed from the set of pins to identify a set of bus groups, each bus group having a plurality of timing pins, and assigning timing for an assigned pin of a first bus group equal to timing calculated for a surrogate pin of the first bus group based on array circuit regularity.
    Type: Application
    Filed: January 12, 2012
    Publication date: July 18, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shyamkumar Thoziyoor, Tae H. Kim, Sang Y. Lee
  • Patent number: 8488329
    Abstract: A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: July 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Tae H. Kim, Sang Y. Lee, Nam H. Pham
  • Patent number: 8465247
    Abstract: An apparatus for loading and unloading a main landing gear (“MLG”) of an aircraft includes a fixture that is adapted to couple to a truck of the MLG such that a sagittal plane of the fixture is parallel to or coplanar with a sagittal plane of the MLG and both translational forces and turning moments applied to the fixture are coupled directly through the fixture to the MLG, a mechanism for controllably translating the fixture in the sagittal plane thereof, and a mechanism for controllably rotating the fixture in the sagittal plane thereof.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: June 18, 2013
    Assignee: The Boeing Company
    Inventors: Oliver J. Groves, Gary F. Heilman, Charles D. Harrison, Bart M. Taylor, Se Y. Chun, Tae H. Kim, Gregory Koyfman, Edward D. Oare, Jacob D. Virnig, Michael H. Konen
  • Publication number: 20130086900
    Abstract: Disclosed is a brake master cylinder configured to sense a variation in magnetic flux in accordance with operation of a piston installed with a magnet, and thus to control activation of brake lamps. The brake master cylinder includes a cylinder body connected to a booster, first and second pistons to reciprocate in the cylinder body, a Hall sensor installed at an outside of the cylinder body, to sense operation of the pistons, for control of activation of brake lamps, a coupling shaft formed at an end of the second piston facing the first piston, and a magnet ring assembly installed at the coupling shaft such that the magnet ring assembly faces the Hall sensor. The magnet ring assembly includes a bushing centrally formed with a fitting hole to receive the coupling shaft, and a ring-shaped magnet fitted around the bushing, to exert magnetic force on the Hall sensor.
    Type: Application
    Filed: September 14, 2012
    Publication date: April 11, 2013
    Applicant: MANDO CORPORATION
    Inventor: Tae H. KIM
  • Publication number: 20130039132
    Abstract: Described embodiments are directed to line drivers, such as those for providing reduced gate induced drain leakage in a memory array. Corresponding methods of operation of line drivers are also disclosed.
    Type: Application
    Filed: August 8, 2011
    Publication date: February 14, 2013
    Inventors: Tae H. Kim, Howard C. Kirsch, Yu-Wen Huang, Mingshiang Wang, Todd A. Merritt
  • Patent number: 8202970
    Abstract: A method for improving the bioavailability of polysaccharides in lignocellulosic materials, involving reacting lignocellulosic materials with ammonia and ethanol.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: June 19, 2012
    Assignee: The United States of America, as represented by the Secretary of Agriculture
    Inventors: Nhuan P. Nghiem, Tae H. Kim, Kevin B. Hicks
  • Patent number: 8201133
    Abstract: A printed circuit board with reduced signal distortion, including one or more layers of non-conductive substrate upon which are disposed conductive pathways that conduct signals, the signals characterized by distortion at least partly caused by orientation of the conductive pathways on the layers of the printed circuit board, and a periodically patterned reference plane; each conductive pathway that conducts signals oriented orthogonally or diagonally at forty-five degrees with respect to other conductive pathways that conduct signals on the printed circuit board; the periodically patterned reference plane comprising a conductor having discontinuities arranged in a periodically recurring pattern, the pattern of the discontinuities oriented on a surface of a layer of the printed circuit board at an optimum angle, with respect to the conductive pathways that conduct signals on the printed circuit board, that reduces distortion of the signals.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: June 12, 2012
    Assignee: International Business Machines Corporation
    Inventors: Moises Cases, Tae H. Kim, Bhyrav M. Mutnury
  • Publication number: 20100119343
    Abstract: An apparatus for loading and unloading a main landing gear (“MLG”) of an aircraft includes a fixture that is adapted to couple to a truck of the MLG such that a sagittal plane of the fixture is parallel to or coplanar with a sagittal plane of the MLG and both translational forces and turning moments applied to the fixture are coupled directly through the fixture to the MLG, a mechanism for controllably translating the fixture in the sagittal plane thereof, and a mechanism for controllably rotating the fixture in the sagittal plane thereof.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 13, 2010
    Applicant: THE BOEING COMPANY
    Inventors: Oliver J. Groves, Gary F. Heilman, Charles D. Harrison, Bart M. Taylor, Se Y. Chun, Tae H. Kim, Gregory Koyfman, Edward D. Oare, Jacob D. Viring, Michael H. Konen
  • Publication number: 20090308649
    Abstract: A printed circuit board with reduced signal distortion, including one or more layers of non-conductive substrate upon which are disposed conductive pathways that conduct signals, the signals characterized by distortion at least partly caused by orientation of the conductive pathways on the layers of the printed circuit board, and a periodically patterned reference plane; each conductive pathway that conducts signals oriented orthogonally or diagonally at forty-five degrees with respect to other conductive pathways that conduct signals on the printed circuit board; the periodically patterned reference plane comprising a conductor having discontinuities arranged in a periodically recurring pattern, the pattern of the discontinuities oriented on a surface of a layer of the printed circuit board at an optimum angle, with respect to the conductive pathways that conduct signals on the printed circuit board, that reduces distortion of the signals.
    Type: Application
    Filed: June 17, 2008
    Publication date: December 17, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Moises Cases, Tae H. Kim, Bhyrav M. Mutnury
  • Patent number: 7460430
    Abstract: Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that adjacent wordlines are driven by wordline drivers enabled by different row decoders. Each wordline driver includes a weak transistor to ground and a strong transistor to ground. By disabling the wordline driver on the wordlines directly adjacent to the active wordlines, a path is provided to drive the coupling noise from the active wordline to ground through the strong transistor.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: December 2, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Tae H. Kim, Charles L. Ingalls, Howard C. Kirsch, Jeremy J. Gum
  • Patent number: 7440344
    Abstract: A voltage level translator boosts the gate voltage of a transistor, and increases the gate to source voltage, to allow operation over a wider range of supply voltages. The P/N ratio of transistors in the voltage level translator is therefore increased, and control of the flipping of nodes is dependent on gate voltages as opposed to P/N ratios.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: October 21, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Tae H. Kim, Michael V. Cordoba, Howard C. Kirsch
  • Patent number: 7417916
    Abstract: Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that adjacent wordlines are driven by wordline drivers enabled by different row decoders. Each wordline driver includes a weak transistor to ground and a strong transistor to ground. By disabling the wordline driver on the wordlines directly adjacent to the active wordlines, a path is provided to drive the coupling noise from the active wordline to ground through the strong transistor.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: August 26, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Tae H. Kim, Charles L. Ingalls, Howard C. Kirsch, Jeremy J. Gum
  • Publication number: 20080166791
    Abstract: A universal glucometer connector system comprising: a glucometer for measuring glucose concentration of blood, and having a top, bottom and side surface; a jacket for retaining the glucometer; a first opening in the jacket for receiving a glucovial that can be one of a plurality of shapes and sizes.
    Type: Application
    Filed: January 8, 2008
    Publication date: July 10, 2008
    Applicant: HealthPia America
    Inventors: Steven Kim, Douglas Kim, Tae H. Kim
  • Patent number: 7200053
    Abstract: A voltage level translator boosts the gate voltage of a transistor, and increases the gate to source voltage, to allow operation over a wider range of supply voltages. The P/N ratio of transistors in the voltage level translator is therefore increased, and control of the flipping of nodes is dependent on gate voltages as opposed to P/N ratios.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: April 3, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Tae H. Kim, Michael V. Cordoba, Howard C. Kirsch
  • Patent number: 7110319
    Abstract: Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that adjacent wordlines are driven by wordline drivers enabled by different row decoders. Each wordline driver includes a weak transistor to ground and a strong transistor to ground. By disabling the wordline driver on the wordlines directly adjacent to the active wordlines, a path is provided to drive the coupling noise from the active wordline to ground through the strong transistor.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: September 19, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Tae H. Kim, Charles L. Ingalls, Howard C. Kirsch, Jeremy J. Gum
  • Patent number: 7034572
    Abstract: A voltage level shifting circuit and method that can be used for shifting the voltage level of an input signal to provide an output signal having a higher output voltage level. The voltage level shifting circuit includes pull-up transistors that are switched OFF by the voltage of a pair of switching nodes and not the voltage at the output node. The speed at which the pull-up transistors can be switched OFF is decoupled to some extent from the speed at which the voltage at the output node changes. Additionally, having the output node separated from the nodes that switch the pull-up transistors OFF further allows for dimensions of the various transistors of the voltage level shifting circuit to be scaled advantageously.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: April 25, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Tae H. Kim, Howard C. Kirsch
  • Patent number: 6975552
    Abstract: A digit line architecture for an array of memory cells exhibiting characteristics of both folded digit line architectures and an open digit line architectures. The digit line architecture includes first and second digit lines having first and second digit line segments. The memory cells of a column are coupled to the first digit line segments. The second digit line segment of the first digit line is located in the memory sub-array with which the column is associated and the second digit line segment of the second digit line extending into the other memory sub-array with which the column is not associated.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: December 13, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Tae H. Kim
  • Patent number: 6142852
    Abstract: A brassiere includes a support portion (straps, sides, back, etc.) for supporting the brassiere on the human body, and two cups joined to the support portion. At least one of the two cups includes an additional elastic portion that is adapted to exercise an elastic retention effect on an oedema of the breast held in the cup. This additional elastic cup portion, which is preferably placed on the exterior of the cup, is adapted to have, in a slacked or unstretched state, a surface area smaller than the cup and a depth smaller than the cup. The additional elastic cup portion is attached solely along its periphery to the periphery of the cup.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: November 7, 2000
    Inventors: Denise Lerolle-Lelorrain, Tae H. Kim, Daniel H. Dunn, Joanne Elizabeth Birnberg, Risa Asmus-Dorweiler
  • Patent number: 5635042
    Abstract: Disclosed herein is a rack for carrying a plurality of lead frames during processes for plating lead frames,which comprises a rack body into which the lead frames are loaded; at least two latch bars which are connected to the rack body and are fixed to/detached from a hoist flight bar to which a plating electrode is electrically connected during plating of lead frames; and an indexing means for positioning the rack as well as positioning an apparatus for transferring the rack, and a plating system using the same.
    Type: Grant
    Filed: November 20, 1995
    Date of Patent: June 3, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo K. Shim, Tae H. Kim, Hwa Y. Lee, Choong H. Han