Abstract: A semiconductor device includes a substrate, a gate formed over the substrate, a gate spacer provided against first and second sidewalls of the gate, and a source/drain region formed in the substrate proximate to the gate spacer.

Abstract: A method for fabricating a transistor, the method includes forming a gate over a substrate to form a first resultant structure, forming a gate spacer at first and second sidewalls of the gate, etching portions of the substrate proximate to the gate spacer to form a recess in a source/drain region of the substrate, forming a first epitaxial layer including germanium to fill the recess, and performing a high temperature oxidation process to form a second epitaxial layer including germanium over an interfacial layer between the substrate and the first epitaxial layer, the second epitaxial layer having a germanium concentration that is higher than a germanium concentration of the first epitaxial SiGe layer, thereby forming a second resultant structure.

Abstract: A semiconductor device includes: a gate pattern over a substrate; recess patterns provided in the substrate at both sides of the gate pattern, each having a side surface extending below the gate pattern; and a source and a drain filling the recess patterns, and forming a strained channel under the gate pattern.

Abstract: A semiconductor device with a low contact resistance and a method for fabricating it are described. The semiconductor device includes a substrate structure with a contact hole and a contact plug formed on the contact hole. The contact plug is provided with an epitaxial silicon layer and a metal layer formed on the epitaxial silicon layer. The method for fabricating such semiconductor device includes steps of exposing a portion of a substrate structure to form a contact hole, then forming an epitaxial silicon layer and a metal layer.

Abstract: A method for fabricating a transistor, the method includes forming a gate over a substrate to form a first resultant structure, forming a gate spacer at first and second sidewalls of the gate, etching portions of the substrate proximate to the gate spacer to form a recess in a source/drain region of the substrate, forming a first epitaxial layer including germanium to fill the recess, and performing a high temperature oxidation process to form a second epitaxial layer including germanium over an interfacial layer between the substrate and the first epitaxial layer, the second epitaxial layer having a germanium concentration that is higher than a germanium concentration of the first epitaxial SiGe layer, thereby forming a second resultant structure.

Abstract: A method for fabricating a semiconductor device includes forming a device isolation structure in a substrate to define active regions, forming a hard mask pattern to open a region defining an active region pattern and to cover the device isolation structure, forming the active region pattern by selectively recessing the device isolation structure formed in the opened region using the hard mask pattern as an etch barrier, removing the hard mask pattern, forming a gate insulation layer over the substrate to cover at least the active region pattern, and forming a gate electrode over the gate insulation layer to cover at least the active region pattern.

Abstract: A method for forming a contact plug of a semiconductor device includes providing a plurality of junctions on a substrate; forming an inter-layer insulation layer over the substrate and the junctions; forming a plurality of contact holes to expose the junctions by etching the inter-layer insulation layer; forming contact layers that fill the contact holes, the contact layers including an epitaxy layer and an amorphous layer, the contact layers formed by using a solid phase epitaxy (SPE) process; and forming a plurality of cell landing plug contacts by selectively planarizing the amorphous layer of the contact layers.

Abstract: A semiconductor device includes an epitaxial layer using a solid phase epitaxy (SPE) process; a first metal layer on the epitaxial layer; a nitride-based barrier metal layer on the first metal layer; a second metal layer on the barrier metal layer; and a metal silicide layer formed between the epitaxial layer and the first metal layer after a post-annealing process.

Abstract: Disclosed is the method of forming the gate in the semiconductor device. The present method can prevent abnormal oxidization and lifting at the interface of the stack gate consisting of polysilicon and a metal and can be applied to even the single metal gate, by replacing a re-oxidization process for recovering damage of the gate oxide film generated in the gate patterning process with the oxygen plasma treatment.

Abstract: A semiconductor device with a low contact resistance and a method for fabricating it are described. The semiconductor device includes a substrate structure with a contact hole and a contact plug formed on the contact hole. The contact plug is provided with an epitaxial silicon layer and a metal layer formed on the epitaxial silicon layer. The method for fabricating such semiconductor device includes steps of exposing a portion of a substrate structure to form a contact hole, then forming an epitaxial silicon layer and a metal layer.

Abstract: Disclosed is a method of manufacturing a semiconductor device. The method comprises the steps of: preparing a silicon substrate having a predetermined lower structure including a gate and a bonding area; forming an interlayer dielectric film on the top side of the substrate; forming a photosensitive film pattern, which exposes an area for providing contact, on the interlayer dielectric film; forming a contact hole exposing a bonding area of the substrate by etching the exposed part of the interlayer dielectric film; removing the photosensitive film pattern; performing a dry cleaning on the exposed bonding area of the substrate so that CF based polymer formed in the etching step is removed; and performing a nitrogen-hydrogen plasma processing on the surface of the exposed bonding area of the substrate so that oxygen polymer and remaining CF-based polymer are removed. Therefore, since hydrogen plasma processing is performed after contact etching, ohmic contact characteristics can be secured.

Abstract: Disclosed is a method of manufacturing a semiconductor device. The method comprises the steps of: preparing a silicon substrate having a predetermined lower structure including a gate and a bonding area; forming an interlayer dielectric film on the top side of the substrate; forming a photosensitive film pattern, which exposes an area for providing contact, on the interlayer dielectric film; forming a contact hole exposing a bonding area of the substrate by etching the exposed part of the interlayer dielectric film; removing the photosensitive film pattern; performing a dry cleaning on the exposed bonding area of the substrate so that CF based polymer formed in the etching step is removed; and performing a nitrogen-hydrogen plasma processing on the surface of the exposed bonding area of the substrate so that oxygen polymer and remaining CF-based polymer are removed. Therefore, since hydrogen plasma processing is performed after contact etching, ohmic contact characteristics can be secured.