Abstract: Disclosed are a storage control method and a storage controller for a virtualization environment with which to provide a virtualization service. The disclosed storage control method may include adjusting an over-provisioning proportion for a virtual storage device allotted to each virtual machine according to an I/O workload pattern for each of the virtual machines; and allotting an over-provisioning space for each of the virtual storage devices according to the over-provisioning proportion.

Abstract: A method for concealing original data to protect personal information is provided. The method includes steps of: a data obfuscation device (a) if the original data is acquired, inputting the original data or its modified data into a learning network, and allowing the learning network to (i) apply a network operation to the original data or the modified data using learned parameters of the learning network and thus to (ii) output characteristic information on the original data or the modified data; and (b) updating the original data or the modified data via backpropagation using part of (i) 1-st losses calculated by referring to the characteristic information and its corresponding 1-st ground truth, and (ii) 2-nd losses calculated by referring to (ii-1) a task specific output generated by using the characteristic information and (ii-2) a 2-nd ground truth corresponding to the task specific output, to thereby generate obfuscated data.

Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a plurality of first lines; a plurality of second lines; a plurality of memory cells disposed in respective intersection regions between the plurality of first lines and the plurality of second lines; a first test circuit configured to apply a stress pulse to a first selection line coupled to a defective memory cell among the plurality of memory cells during a first test period, in response to a first test control signal, the first selection line including any one of the plurality of first lines; and a control unit configured to generate the first test control signal based on a first test mode signal.

Abstract: Provided herein may be a memory device and a memory system including the memory device. The memory device may include a memory block including a plurality of memory cells, a peripheral circuit configured to perform a selective erase operation on the memory cells, and control logic configured to control, during the selective erase operation, the peripheral circuit to apply an erase allowable voltage to a selected word line among a plurality of word lines in the memory block, apply an erase voltage to a selected string among a plurality of strings in the memory block, and float unselected word lines and unselected strings.

Abstract: A memory system includes a controller configured to transfer first data for a program operation, and a memory device configured to perform an error check operation for determining whether second data received from the controller are equal to the first data and the program operation for storing the first data.

Abstract: A display device includes: a first pixel region including first pixels, each of the first pixels including a driving transistor to be initialized by a first initialization power source supplied from a first power line; a second pixel region including second pixels, each of the second pixels including a driving transistor to be initialized by a second initialization power source supplied from a second power line; and a power supplier to supply the first initialization power source and the second initialization power source, the first initialization power source and the second initialization power source having a same voltage level when the display device is driven in a first mode, and the first initialization power source and the second initialization power source having different voltage levels during at least one frame period when the display device is driven in a second mode.

Abstract: A non-rectangular display includes: a plurality of first signal lines extending along a first direction; a plurality of DC voltage lines extending along the first direction; and a plurality of second signal lines extending along the first direction, wherein a first DC voltage line of the plurality of DC voltage lines is between a first line of the plurality of first signal lines and a second line of the plurality of second signal lines, a second DC voltage line of the plurality of DC voltage lines is between a third line of the plurality of first signal lines and a fourth line of the plurality of second signal lines, and the first and third lines are adjacent to each other, or the second and fourth lines are adjacent to each other.

Abstract: A coil electronic component includes a body portion and an external electrode. The body portion includes a coil layer and a reinforcing layer disposed on at least one of an upper portion and a lower portion of the coil layer. The external electrode is disposed on an outer surface of the body portion. The coil layer includes an insulating layer, a coil pattern, and a first conductivity type via penetrating through the insulating layer to be connected to the coil pattern, and the reinforcing layer has a higher degree of rigidity than the insulating layer.

Abstract: A method for analyzing an abdominal disease based on a medical image, includes receiving and preprocessing a medical image obtained by photographing an abdominal region of a patient to detect a plurality of analysis candidate regions and setting one of the plurality of analysis candidate regions as a ROI, calculating a nodule grade based on surface unevenness of the ROI, calculating a cellular heterogeneity coefficient based on pixel homogeneity of the ROI, and predicting and outputting an abdominal disease value based on the nodule grade and the cellular heterogeneity coefficient.

Abstract: A method for learning an obfuscation network used for concealing original data is provided. The method includes steps of: a learning device instructing the obfuscation network to obfuscate inputted training data, inputting the obfuscated training data into a learning network, and allowing the learning network to apply a network operation to the obfuscated training data and thus to generate 1-st characteristic information, and allowing the learning network to apply a network operation to the inputted training data and thus to generate 2-nd characteristic information, and learning the obfuscation network such that an error is minimized, calculated by referring to part of an error acquired by referring to the 1-st and the 2-nd characteristic information, and an error acquired by referring to a task specific output and its corresponding ground truth, and such that an error is maximized, calculated by referring to the training data and the obfuscated training data.

Abstract: The present invention relates to a composition comprising centipede grass extract as an active ingredient for the prevention or treatment of alopecia. Particularly, the centipede grass extract of the present invention increases the expression of hair growth related factors and accelerates hair growth, so that it can be effectively used for the prevention or treatment of alopecia.

Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes: a write circuit configured to supply a write pulse to at least one of a plurality of memory cells in a write mode, the write pulse corresponding to write data; and a write pulse conversion circuit configured to change a waveform of the write pulse, the waveform having a falling edge, the write pulse conversion circuit changing the falling edge of the wave form to have two or more slopes.

Abstract: A method for learning an adaption network corresponding to an obfuscation network used for concealing original data is provided. The method includes steps of: (a) on condition that a 1-st learning device has performed or is performing processes of (i) instructing the obfuscation network to obfuscate the training data to generate obfuscated training data, (ii) inputting the obfuscated training data into a learning network to generate 1-st characteristic information for training and inputting the training data into the learning network to generate 2-nd characteristic information for training, and (iii) learning the obfuscation network, a 2-nd learning device performing one of inputting the training data into the adaption network to generate 1-st feature adapted data and inputting test data into the adaption network to generate 2-nd feature adapted data and one of (i) acquiring a 1-st adaption ground truth and learning the adaption network and (ii) learning the adaption network.

Abstract: A method for learning a user learning network to recognize obfuscated data created by concealing original data is provided. The method includes steps of: a 2-nd learning device, (a) on condition that a 1-st learning device has performed (i) instructing the obfuscation network to generate obfuscated training data, (ii) inputting (ii-1) the obfuscated training data into, to generate 1-st characteristic information for training, and (ii-2) the training data, to generate 2-nd characteristic information for training, into a learning network for training and (iii) learning the obfuscation network, and acquiring (i) the obfuscated training data and a training data GT, or (ii) obfuscated test data and a test data GT; (b) inputting (i) the obfuscated training data, to generate 3-rd characteristic information for training, or (ii) the obfuscated test data, to generate 4-th characteristic information for training, into the user learning network; and (c) learning the user learning network.

Abstract: The present disclosure relates to a pixel displaying an image. A pixel includes an organic light emitting diode, a first transistor controlling an amount of current flowing from a first driving power supply to a second driving power supply via the organic light emitting diode in response to a voltage of a first node; a storage capacitor connected between the first node and the first driving power supply; a second transistor connected between a data line and the first node and turned on when a scan signal is supplied to a first scan line, and an auxiliary transistor connected between the second transistor and the data line and turned on when a scan signal is supplied to a second scan line. The second transistor and the auxiliary transistor have an overlapping turn-on period, and the second transistor is turned off before the auxiliary transistor is turned off.

Abstract: The present invention relates to a microbial insecticide for control of thrips, comprising a Beauveria bassiana ERL836 strain (KCCM11506P) or a spore thereof. The insecticide of the present invention shows an insecticidal activity as potent as pre-existing chemical insecticides against thrips, is environmentally friendly, and easy to manage and produce, thus finding outstanding commercial applications.

Abstract: A platooning controller includes a processor configured to control platooning based on platooning control vehicle information when platooning vehicles, including one leader vehicle and at least one or more following vehicles, are traveling. The platooning controller is further configured to monitor information associated with an energy state of each of the platooning vehicles while platooning, and to adjust a platoon formation based on a change in the energy state of each of the platooning vehicles. The platooning controller further includes a storage configured to store information obtained to adjust the platoon formation by the processor.

Abstract: A multilayer ceramic capacitor includes a body including first and second dielectric layers and having first to sixth surfaces; a second internal electrode disposed on the second dielectric layer to face the first internal electrode with the first or second dielectric layer interposed therebetween, exposed to the fourth, fifth, and sixth surfaces, and disposed to be spaced apart from the third surface by a second space; a first dielectric pattern disposed in at least a portion of the first space; a second dielectric pattern disposed in at least a portion of the second space; a side insulating layer disposed on the fifth and sixth surfaces; a first external electrode disposed on the third surface; and a second external electrode disposed on the fourth surface, in which the first and second dielectric patterns have a color different from the first and second dielectric layers.

Abstract: The present invention relates to a virtualized resource monitoring system which collects system resource-related information and log and can analyze a usage rate of computing resources of a virtual machine. A virtualized resource monitoring system (RV-MON) according to the present invention includes: an RV-MON agent which collects resource information of a plurality of virtualization servers and a plurality of virtual machines through a hypervisor; and an RV-MON service unit which integrates, stores, and aligns the resource information, and provides the resource information to an external module a storage pattern set from a monitoring unit.

Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a write circuit suitable for generating a first write current at a first point of time corresponding to pre-write latency that is shorter than write latency and generating a second write current at a second point of time corresponding to the write latency, based on a write command signal, a write data signal, and a latency information signal, and a memory cell array suitable for storing a data value corresponding to the write data signal based on the first and second write currents.