Abstract: A display device includes a substrate including a first pixel region, a second pixel region having an area smaller than that of the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region, a second pixel provided in the second pixel region, a second line connected to the second pixel, an extension line extended to the peripheral region, a dummy part located in the peripheral region to overlap with the extension line, a power line connected to the first and second pixel regions, and a connection line located in the peripheral region to be connected to the dummy part, the connection line being electrically connected to a portion of the second pixel region, wherein the second pixel region includes a first sub-pixel region connected to the connection line and a second sub-pixel region except the first sub-pixel region.

Abstract: A display device is disclosed, and the display device includes a substrate including first to third display regions, the second and the third display regions being spaced from each other, each of the second and third display regions having an area smaller than that of the first display region and being continuous to the first display region, first to third pixels in the first to third display regions, first to third lines connected to the first to third pixels, and a dummy part configured to compensate for a difference between a load value of the first lines and load values of the second and third lines, wherein the second display region includes a first sub-region adjacent to the first display region and a second sub-region spaced from the first display region, and the third display region includes a third sub-region adjacent to the first display region and a fourth sub-region spaced from the first display region.

Abstract: A display device is provided. The display device comprises a display panel including a plurality of signal pads and one or more dummy pads, and at least one flexible wiring board providing signals to the signal pads, wherein a maximum bias period of signals provided to a pair of adjacent signal pads with at least one dummy pad interposed therebetween is longer than a maximum bias period of signals provided to a pair of adjacent signal pads with no dummy pad disposed therebetween.

Abstract: A display device includes first and second pixel areas spaced apart from each other so that corresponding scan lines are separate from each other, a first non-pixel area at a periphery of the first pixel area, a second non-pixel area at a periphery of the second pixel area and opposite to the first non-pixel area with at least one pixel area interposed therebetween, first scan lines in the first pixel area, second scan lines in the second pixel area, a first scan driver in the first non-pixel area and connected to the first scan lines, a second scan driver in the second non-pixel area and connected to the second scan lines, first wires in the first non-pixel area and connected to the first scan driver, second wires in the second non-pixel area and connected to the second scan driver; and connecting wires connecting the first wires and second wires.

Abstract: A stage includes an output, an input, signal processors, and a stabilizer. The output supplies a voltage of a first or second power source to an output terminal based on voltages of first and second nodes. The input controls voltages of third and fourth nodes based on signals to a first and second input terminals. A first signal processor controls the voltage of the first node based on the voltage of the second node. A second signal processor is connected to a fifth node and controls the voltage of the first node based on a signal to a third input terminal. A third signal processor controls the voltage of the fourth node based on the voltage of the third node and the signal to the third input terminal. The stabilizer is connected between the second signal processor and input to control voltage drop widths of the third and fourth nodes.

Abstract: A display device includes: a substrate including a display area and a non-display area; pixels connected to first scan lines, second scan lines, third scan lines, and emission control lines; a first scan driver supplying a first scan signal to the first scan lines; a second scan driver supplying a second scan signal to some of the second scan lines and supplying a third scan signal to the third scan lines; an emission driver supplying an emission control signal to the emission control lines; a first pad and a second pad provided in the non-display area; a first power line connected to the first pad, the first power line transferring a first voltage to the first scan driver and the emission driver; and a second power line connected to the second pad, the second power line transferring a second voltage to the second scan driver.

Abstract: A clutch engagement assembly for a door lock device includes a first shaft having at an end thereof an insertion end portion in which a channel is formed; a second drive shaft having a hollow engagement end portion into which the insertion end portion of the first shaft is inserted; a driving member which provides a driving force; and a pin member that is installed in a state of being elastically supported in the engagement end portion of the second shaft and is movable by the driving member so as to extending through (be inserted in) at least a part of the first shaft and at least a part of the second shaft, thereby causing a clutch engagement or a disengagement between a first shaft and a second shaft. The clutch engagement assembly may provide a relatively small size structure of the door lock device and a firm engagement force.

Abstract: A display device includes a substrate including a first pixel region, a second pixel region having an area smaller than that of the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region, a second pixel provided in the second pixel region, a second line connected to the second pixel, an extension line extended to the peripheral region, a dummy part located in the peripheral region to overlap with the extension line, a power line connected to the first and second pixel regions, and a connection line located in the peripheral region to be connected to the dummy part, the connection line being electrically connected to a portion of the second pixel region, wherein the second pixel region includes a first sub-pixel region connected to the connection line and a second sub-pixel region except the first sub-pixel region.

Abstract: Disclosed is a lever-type door lock driving assembly which can be installed inside a mounting hole to enable miniaturization of the device, ensure general versatility, and prevent a fragile area from being generated inside the door. The present invention relates to a driving assembly for a lever-type door lock arranged in an installation hole to drive a latch operating body, wherein the mounting assembly comprise a mounting module having a truncated disc shape and having at least one driving plate therein; and a motor unit mounted on the truncated area of the mounting module and having a disk shape in a state of being coupled to the mounting module.

Abstract: A display device includes a peripheral area around a display area, a plurality of pixels in the display area, and a plurality of signal lines connected to the pixels. The signal lines include a plurality of data lines connected to the pixels, a crack detection line connected to first data lines among the data lines through a first transistor, and a control line connected to a gate of the first transistor. The crack detection line is in the peripheral area.

Abstract: A gate driver includes a stage configured to output a gate signal, the stage including an input part configured to control a voltage of a first node and a voltage of a second node based on signals supplied to a first input terminal and a second input terminal, an output part configured to supply a voltage of a first power source or a voltage of a second power source as the gate signal to an output terminal based on a voltage of a third node and a voltage of a fourth node, a first signal processing part configured to supply the voltage of the second power source to the fourth node based on the voltage of the first node, or to electrically connect the second node and the fourth node through a fifth node based on a signal supplied to a third input terminal, and a second signal processing part including a first transistor connected between the third node and a sixth node to control the voltage of the third node based on an operation of the first transistor.

Abstract: A display device is provided. The display device comprises a display panel including a plurality of signal pads and one or more dummy pads, and at least one flexible wiring board providing signals to the signal pads, wherein a maximum bias period of signals provided to a pair of adjacent signal pads with at least one dummy pad interposed therebetween is longer than a maximum bias period of signals provided to a pair of adjacent signal pads with no dummy pad disposed therebetween.

Abstract: A display device includes a substrate including a first pixel area, a second pixel area, and a third pixel area, each of the second and third pixel areas having a smaller surface area than the first pixel area and being connected to the first pixel area, first to third pixels provided in the first to third pixel areas, respectively, first to third lines connected to the first to third pixels, respectively, a line connecting part connecting the second and third lines, and a dummy unit overlapping the line connecting part to compensate for a difference of a load value of the first line and a load value of the second line.

Abstract: The present disclosure relates to a display device including first pixels disposed in a first pixel area, and connected to first scan lines; second pixels disposed in a second pixel area, and connected to second scan lines; a timing controller configured to supply a first clock signal and a second clock signal to a first clock line and a second clock line, respectively; a first scan driver configured to receive the first clock signal through the first clock line, and to supply a first scan signal to the first scan lines; and a second scan driver configured to receive the second clock signal through the second clock line, and to supply a second scan signal to the second scan lines, wherein the second pixel area has a smaller width than the first pixel area.

Abstract: A display device includes a substrate having a display area and a non-display area. A plurality of pixels is disposed in the display area of the substrate. A plurality of data lines is connected to the plurality of pixels. A crack sensing line is connected to at least one of the plurality of data lines. The crack sensing line is disposed in the non-display area of the substrate. A dummy pattern layer is connected to the crack sensing line.

Abstract: A stage including: an output circuit to supply a voltage of a first power source or a second power source to an output terminal based on voltages of a first node and a second node; and a stabilizer circuit connected to the first power source and the first node to maintain the voltage of the second node when the voltage of the first power source is to be output to the output terminal, the output circuit and the stabilizer circuit being commonly connected to a first electrode and a second electrode of a capacitor.

Abstract: A display device includes a substrate having a pixel area with at least a first rounded corner portion and first to third non-pixel areas arranged sequentially along an outer circumference of the pixel area. An internal circuit in the first non-pixel area has a first end portion adjacent to the first rounded corner portion of the pixel area. The first end portion of the internal circuit is rounded in accordance with the first rounded corner portion. A plurality of routing wires are in the third non-pixel area below the pixel area. The routing wires extending to the pixel area via the second non-pixel area and the first non-pixel area. The routing wires include at least a first routing wire connected to the pixel area passing an area of the first end portion of the internal circuit.

Abstract: A display device including a first pixel area including first pixels, a second pixel area including second pixels, a third pixel area including third pixels, and a display driver configured to control image display operations of the first pixel area, the second pixel area, and the third pixel area according to a first mode or a second mode, wherein the first pixel area includes a first sub-pixel area, and a second sub-pixel area between the first sub-pixel area and the second pixel area, and wherein the first sub-pixel area is configured to display a black image in the first mode, and the second sub-pixel area is configured to display a dummy image.

Abstract: The present disclosure relates to a display device including first pixels disposed in a first pixel area, and connected to first scan lines; second pixels disposed in a second pixel area, and connected to second scan lines; a timing controller configured to supply a first clock signal and a second clock signal to a first clock line and a second clock line, respectively; a first scan driver configured to receive the first clock signal through the first clock line, and to supply a first scan signal to the first scan lines; and a second scan driver configured to receive the second clock signal through the second clock line, and to supply a second scan signal to the second scan lines, wherein the second pixel area has a smaller width than the first pixel area.

Abstract: A display device includes first and second pixel areas spaced apart from each other so that corresponding scan lines are separate from each other, a first non-pixel area at a periphery of the first pixel area, a second non-pixel area at a periphery of the second pixel area and opposite to the first non-pixel area with at least one pixel area interposed therebetween, first scan lines in the first pixel area, second scan lines in the second pixel area, a first scan driver in the first non-pixel area and connected to the first scan lines, a second scan driver in the second non-pixel area and connected to the second scan lines, first wires in the first non-pixel area and connected to the first scan driver, second wires in the second non-pixel area and connected to the second scan driver; and connecting wires connecting the first wires and second wires.