Abstract: A display device includes a peripheral area around a display area, a plurality of pixels in the display area, and a plurality of signal lines connected to the pixels. The signal lines include a plurality of data lines connected to the pixels, a crack detection line connected to first data lines among the data lines through a first transistor, and a control line connected to a gate of the first transistor. The crack detection line is in the peripheral area.

Abstract: A display device includes: a display region including a first pixel region, a second pixel region, and a third pixel region; a dummy region including a first dummy region disposed between the second pixel region and the third pixel region; first, second, and third pixels respectively arranged in the first pixel region, the second pixel region, and the third pixel region in a matrix of vertical lines and horizontal lines; a data converter configured to: receive first image data including effective data corresponding to the display region and dummy data corresponding to the dummy region; and generate second image data by converting a gray scale value of dummy data corresponding to at least one region of the first dummy region in the first image data into a predetermined first gray scale value, the first gray scale value being between a lowest gray scale value and a highest gray scale value.

Abstract: A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.

Abstract: A display device includes first pixels in a first pixel region and connected to first scan lines and second pixels in a second pixel region connected to second scan lines. The second pixel has a width less than the first pixel region. The display device also includes a first scan driver to supply first scan signals to the first scan lines, a second scan driver to supply second scan signals to the second scan lines, a first signal line to supply a first driving signal to the first scan driver and the second scan driver, and a signal delay circuit connected to the first signal line to delay the first driving signal.

Abstract: A display device includes: a display panel including a plurality of pixels; a scan driver configured to supply a scan signal to the plurality of pixels through a plurality of scan lines based on a scan start signal; an emission driver configured to supply an emission control signal to the plurality of pixels through a plurality of emission control lines based on an emission control start signal; and a timing controller configure to control an interval between a plurality of gate-on periods of the scan start signal within a gate-off period of the emission control start signal based on a dimming level.

Abstract: A display device is disclosed, and the display device includes a substrate including first to third display regions, the second and the third display regions being spaced from each other, each of the second and third display regions having an area smaller than that of the first display region and being continuous to the first display region, first to third pixels in the first to third display regions, first to third lines connected to the first to third pixels, and a dummy part configured to compensate for a difference between a load value of the first lines and load values of the second and third lines, wherein the second display region includes a first sub-region adjacent to the first display region and a second sub-region spaced from the first display region, and the third display region includes a third sub-region adjacent to the first display region and a fourth sub-region spaced from the first display region.

Abstract: A stage includes an output, an input, signal processors, and a stabilizer. The output supplies a voltage of a first or second power source to an output terminal based on voltages of first and second nodes. The input controls voltages of third and fourth nodes based on signals to a first and second input terminals. A first signal processor controls the voltage of the first node based on the voltage of the second node. A second signal processor is connected to a fifth node and controls the voltage of the first node based on a signal to a third input terminal. A third signal processor controls the voltage of the fourth node based on the voltage of the third node and the signal to the third input terminal. The stabilizer is connected between the second signal processor and input to control voltage drop widths of the third and fourth nodes.

Abstract: Disclosed is a display device including: a substrate including a display area for displaying an image and a peripheral area neighboring the display area; a plurality of signal lines formed in the display area; a pad formed in the peripheral area; and a plurality of connection wires for connecting the signal lines and the pad, wherein a first connection wire and a second connection wire neighboring the first connection wire from among the plurality of connection wires are disposed on different layers, and the first connection wire and the second connection wire, which are formed to extend from the pad and are bent at least twice to have at least one being bent toward backward direction, are disposed in the peripheral area.

Abstract: A display device is provided. The display device comprises a display panel including a plurality of signal pads and one or more dummy pads, and at least one flexible wiring board providing signals to the signal pads, wherein a maximum bias period of signals provided to a pair of adjacent signal pads with at least one dummy pad interposed therebetween is longer than a maximum bias period of signals provided to a pair of adjacent signal pads with no dummy pad disposed therebetween.

Abstract: A display device includes a peripheral area around a display area, a plurality of pixels in the display area, and a plurality of signal lines connected to the pixels. The signal lines include a plurality of data lines connected to the pixels, a crack detection line connected to first data lines among the data lines through a first transistor, and a control line connected to a gate of the first transistor. The crack detection line is in the peripheral area.

Abstract: A display device includes a substrate having a pixel area with at least a first rounded corner portion and first to third non-pixel areas arranged sequentially along an outer circumference of the pixel area. An internal circuit in the first non-pixel area has a first end portion adjacent to the first rounded corner portion of the pixel area. The first end portion of the internal circuit is rounded in accordance with the first rounded corner portion. A plurality of routing wires are in the third non-pixel area below the pixel area. The routing wires extending to the pixel area via the second non-pixel area and the first non-pixel area. The routing wires include at least a first routing wire connected to the pixel area passing an area of the first end portion of the internal circuit.

Abstract: An organic light-emitting display device includes: a substrate on which a display area and a non-display area surrounding the display area are defined, the display area includes a main area and at least one protruding area, and a plurality of pixels is in the display area; a first signal line on the substrate in the main area to provide signals to the plurality of pixels; a second signal line on the substrate in the protruding area to provide signals to the plurality of pixels; a compensation line on the substrate in the non-display area and electrically connected to the second signal line; and a bridge pattern over the second signal line and the compensation line in the non-display area and electrically connecting the second signal line with the compensation line, the bridge pattern including a double-bridge structure.

Abstract: A display device includes a substrate including a first pixel area, a second pixel area, and a third pixel area, each of the second and third pixel areas having a smaller surface area than the first pixel area and being connected to the first pixel area, first to third pixels provided in the first to third pixel areas, respectively, first to third lines connected to the first to third pixels, respectively, a line connecting part connecting the second and third lines, and a dummy unit overlapping the line connecting part to compensate for a difference of a load value of the first line and a load value of the second line.

Abstract: A display device is disclosed, and the display device includes a substrate including first to third display regions, the second and the third display regions being spaced from each other, each of the second and third display regions having an area smaller than that of the first display region and being continuous to the first display region, first to third pixels in the first to third display regions, first to third lines connected to the first to third pixels, and a dummy part configured to compensate for a difference between a load value of the first lines and load values of the second and third lines, wherein the second display region includes a first sub-region adjacent to the first display region and a second sub-region spaced from the first display region, and the third display region includes a third sub-region adjacent to the first display region and a fourth sub-region spaced from the first display region.

Abstract: A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.

Abstract: A stage includes an output, an input, signal processors, and a stabilizer. The output supplies a voltage of a first or second power source to an output terminal based on voltages of first and second nodes. The input controls voltages of third and fourth nodes based on signals to a first and second input terminals. A first signal processor controls the voltage of the first node based on the voltage of the second node. A second signal processor is connected to a fifth node and controls the voltage of the first node based on a signal to a third input terminal. A third signal processor controls the voltage of the fourth node based on the voltage of the third node and the signal to the third input terminal. The stabilizer is connected between the second signal processor and input to control voltage drop widths of the third and fourth nodes.

Abstract: A display device includes first and second pixel areas spaced apart from each other so that corresponding scan lines are separate from each other, a first non-pixel area at a periphery of the first pixel area, a second non-pixel area at a periphery of the second pixel area and opposite to the first non-pixel area with at least one pixel area interposed therebetween, first scan lines in the first pixel area, second scan lines in the second pixel area, a first scan driver in the first non-pixel area and connected to the first scan lines, a second scan driver in the second non-pixel area and connected to the second scan lines, first wires in the first non-pixel area and connected to the first scan driver, second wires in the second non-pixel area and connected to the second scan driver; and connecting wires connecting the first wires and second wires.

Abstract: A display device includes a substrate having a pixel area with at least a first rounded corner portion and first to third non-pixel areas arranged sequentially along an outer circumference of the pixel area. An internal circuit in the first non-pixel area has a first end portion adjacent to the first rounded corner portion of the pixel area. The first end portion of the internal circuit is rounded in accordance with the first rounded corner portion. A plurality of routing wires are in the third non-pixel area below the pixel area. The routing wires extending to the pixel area via the second non-pixel area and the first non-pixel area. The routing wires include at least a first routing wire connected to the pixel area passing an area of the first end portion of the internal circuit.

Abstract: A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.

Abstract: A display device includes a substrate, first pixels, second pixels, and third pixels. The substrate has a first pixel area, a second pixel area, and a third pixel area. The first pixels are in the first pixel area and are connected to first scan lines and first emission control lines. The second pixels are in the second pixel area and are connected to second scan lines and second emission control lines. The third pixels are in the third pixel area and are connected to third scan lines and third emission control lines. The second scan lines are spaced apart from the third scan lines, and the second emission control lines are spaced apart from the third emission control lines.