Patents by Inventor Tae Hyeok Lee

Tae Hyeok Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210134808
    Abstract: A method for fabricating a semiconductor device includes: forming a first conductive structure over a substrate; forming a multi-layer spacer including a non-conformal sacrificial spacer on both sidewalls of the first conductive structure; forming a second conductive structure adjacent to the first conductive structure with the multi-layer spacer therebetween; forming an air gap by removing the non-conformal sacrificial spacer; forming a capping layer covering the second conductive structure and the air gap; forming an opening that exposes a top surface of the second conductive structure by etching the capping layer; and forming a conductive pad coupled to the second conductive structure in the opening.
    Type: Application
    Filed: December 15, 2020
    Publication date: May 6, 2021
    Inventors: Chan-Bae KIM, Sang-Soo PARK, Tae-Hyeok LEE
  • Patent number: 10930655
    Abstract: A method for fabricating a semiconductor device includes: forming a first conductive structure over a substrate; forming a multi-layer spacer including a non-conformal sacrificial spacer on both sidewalls of the first conductive structure; forming a second conductive structure adjacent to the first conductive structure with the multi-layer spacer therebetween; forming an air gap by removing the non-conformal sacrificial spacer; forming a capping layer covering the second conductive structure and the air gap; forming an opening that exposes a top surface of the second conductive structure by etching the capping layer; and forming a conductive pad coupled to the second conductive structure in the opening.
    Type: Grant
    Filed: December 24, 2018
    Date of Patent: February 23, 2021
    Assignee: SK hynix Inc.
    Inventors: Chan-Bae Kim, Sang-Soo Park, Tae-Hyeok Lee
  • Publication number: 20200020697
    Abstract: A method for fabricating a semiconductor device includes: forming a first conductive structure over a substrate; forming a multi-layer spacer including a non-conformal sacrificial spacer on both sidewalls of the first conductive structure; forming a second conductive structure adjacent to the first conductive structure with the multi-layer spacer therebetween; forming an air gap by removing the non-conformal sacrificial spacer; forming a capping layer covering the second conductive structure and the air gap; forming an opening that exposes a top surface of the second conductive structure by etching the capping layer; and forming a conductive pad coupled to the second conductive structure in the opening.
    Type: Application
    Filed: December 24, 2018
    Publication date: January 16, 2020
    Inventors: Chan-Bae KIM, Sang-Soo PARK, Tae-Hyeok LEE
  • Patent number: 9425054
    Abstract: A method for fabricating a semiconductor device includes: preparing a substrate; performing a pre-treatment including a first hydrogen annealing on a surface of the substrate; forming a gate dielectric layer over the substrate; performing a post-treatment including a second hydrogen annealing on the substrate including the gate dielectric layer; and forming a gate electrode over the gate dielectric layer.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: August 23, 2016
    Assignee: SK Hynix Inc.
    Inventors: Tae-Hyeok Lee, Kyu-Tae Park
  • Publication number: 20150380253
    Abstract: A method for fabricating a semiconductor device includes: preparing a substrate; performing a pre-treatment including a first hydrogen annealing on a surface of the substrate; forming a gate dielectric layer over the substrate; performing a post-treatment including a second hydrogen annealing on the substrate including the gate dielectric layer; and forming a gate electrode over the gate dielectric layer.
    Type: Application
    Filed: September 24, 2014
    Publication date: December 31, 2015
    Inventors: Tae-Hyeok LEE, Kyu-Tae PARK
  • Patent number: 7153739
    Abstract: The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: December 26, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chang Rock Song, Sang Ho Woo, Dong Su Park, Cheol Hwan Park, Tae Hyeok Lee
  • Patent number: 7084072
    Abstract: Disclosed is a method of manufacturing a semiconductor device. The method includes the steps of forming a gate in a cell region and a peripheral region of a substrate, depositing a buffer oxide layer on the gate and the substrate, annealing a resultant structure of the substrate, depositing a nitride spacer layer on the buffer oxide layer, depositing an oxide spacer layer on the nitride spacer layer, forming an oxide spacer at the peripheral region of the substrate, and removing the oxide spacer layer remaining in the cell region. The annealing step is additionally carried out after depositing the buffer oxide layer so as to improve the interfacial surface characteristic and film quality, so that oxide etchant is prevented from penetrating into the silicon substrate during the wet dip process. Unnecessary voids are prevented from being created in the silicon substrate.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: August 1, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Cheol Hwan Park, Sang Ho Woo, Chang Rock Song, Dong Su Park, Tae Hyeok Lee
  • Patent number: 6964930
    Abstract: In fabricating a dielectric layer, a semiconductor substrate which has been washed is provided. A first nitride film is formed by loading the substrate in a first furnace and subjecting the substrate to a first nitride treatment. A first oxide film is formed by unloading the substrate having the first nitride film out of the first furnace and subjecting the substrate to a first nitride treatment by introducing air while the substrate is unloaded. A second nitride film is formed by loading the substrate having the first oxide film in a second furnace and subjecting the substrate to a second nitride treatment. A second oxide film is formed by subjecting the top surface of the second nitride film to a second oxide treatment.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: November 15, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Dong Su Park, Tae Hyeok Lee, Chang Rock Song, Cheol Hwan Park
  • Patent number: 6962856
    Abstract: A method for forming a device isolation film of a semiconductor device, wherein an annealing process is performed on the oxide film using NH3 prior to the deposition of a liner nitride film and after the deposition of a thermal oxide film on a sidewall of a trench to nitridate the oxide film is disclosed.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: November 8, 2005
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Cheol Hwan Park, Dong Su Park, Tae Hyeok Lee, Sang Ho Woo
  • Patent number: 6955974
    Abstract: A method for forming an isolation layer of a semiconductor device, which comprises the steps of: a) sequentially forming a pad oxide layer and a pad nitride layer on a silicon substrate; b) etching the pad nitride layer, the pad oxide layer, and the silicon substrate, thereby forming a trench; c) thermal-oxidizing the resultant substrate to form a sidewall oxide layer on a surface of the trench; d) nitrifying the sidewall oxide layer through the use of NH3 annealing; e) depositing a liner aluminum nitride layer on an entire surface of the silicon substrate inclusive of the nitrated sidewall oxide layer; f) depositing a buried oxide layer on the liner aluminum nitride layer to fill the trench; g) performing a chemical mechanical polishing process with respect to the buried oxide layer; and h) eliminating the pad nitride layer.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: October 18, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Tae Hyeok Lee, Cheol Hwan Park, Dong Su Park, Ho Jin Cho, Eun A Lee
  • Patent number: 6927152
    Abstract: The present invention relates to a method for fabricating a semiconductor device. The method comprises the steps of: 1. A method for fabricating a semiconductor device, which comprises the steps of: forming a gate line on a semiconductor substrate; forming junction regions in the semiconductor substrate at both sides of the gate line; forming and selectively removing an interlayer insulating film on the substrate to form contact holes exposing the junction regions; forming plugs in the contact holes; and implanting impurity ions into the plugs; and annealing the junction regions.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: August 9, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Seung Woo Jin, Tae Hyeok Lee, Bong Soo Kim
  • Patent number: 6913963
    Abstract: A method for fabricating a capacitor for a semiconductor device is disclosed, which comprises the steps of: forming a storage node electrode on a semiconductor wafer, forming a dielectric layer made of a cyclic silicon nitride layer on the surface of the storage node electrode, and forming an upper electrode on the dielectric layer; lowering the thickness Teff of the dielectric layer and improving leakage current characteristics through use of a cyclic Si3N4 or a cyclic SiOxNy (wherein x falls between 0.1 and 0.9 and y falls between 0.1 and 2), having a large oxidation resistance and high dielectric ratio, as a dielectric.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: July 5, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Tae Hyeok Lee, Cheol Hwan Park, Dong Su Park, Sang Ho Woo
  • Patent number: 6884678
    Abstract: A method for forming of a capacitor wherein an etching barrier layer comprising a stacked structure of a nitride film and a tantalum oxide film is disclosed. The method comprises the steps of: forming an etching barrier layer on an interlayer insulating film having a storage electrode contact plug therein, the etching barrier layer comprising a stacked structure of a nitride film and a tantalum oxide film; forming an oxide film on the etching barrier layer; selectively etching the oxide film and the etching barrier layer to form an opening exposing the storage electrode contact plug; depositing a storage electrode layer on the bottom and the inner walls of the opening; and removing the oxide film, whereby forming a storage electrode.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: April 26, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Dong Su Park, Tae Hyeok Lee, Cheol Hwan Park
  • Patent number: 6825518
    Abstract: A capacitor in a semiconductor device and a method for fabricating the same is disclosed. Disclosed the method for fabricating the capacitor in a semiconductor device comprises the steps of: forming a lower electrode made of doped silicon materials on a semiconductor substrate; depositing a thin silicon nitride layer on the lower electrode; forming a silicon oxynitride layer on the surface of the silicon nitride layer through oxidation of the silicon nitride layer; depositing a dielectric layer on the silicon oxynitride layer; and forming an upper electrode on the dielectric layer.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: November 30, 2004
    Assignee: Hynix Semiconductor Inc.
    Inventors: Cheol Hwan Park, Dong Su Park, Tae Hyeok Lee, Sang Ho Woo
  • Publication number: 20040219802
    Abstract: Disclosed is a method of fabricating a dielectric layer, the method comprising the steps of: providing a semiconductor substrate which has been washed; forming a first nitride film by loading the substrate in a first furnace and subjecting the substrate to a first nitride treatment; forming a first oxide film by unloading the substrate having the first nitride film out of the first furnace and subjecting the substrate to a first nitride treatment by means of air introduced while the substrate is unloaded; forming a second nitride film by loading the substrate having the first oxide film in a second furnace and subjecting the substrate to a second nitride treatment; and forming a second oxide film by subjecting the top surface of the second nitride film to a second oxide treatment.
    Type: Application
    Filed: December 18, 2003
    Publication date: November 4, 2004
    Inventors: Dong Su Park, Tae Hyeok Lee, Chang Rock Song, Cheol Hwan Park
  • Publication number: 20040175894
    Abstract: The present invention relates to a method for fabricating a semiconductor device. The method comprises the steps of: 1. A method for fabricating a semiconductor device, which comprises the steps of: forming a gate line on a semiconductor substrate; forming junction regions in the semiconductor substrate at both sides of the gate line; forming and selectively removing an interlayer insulating film on the substrate to form contact holes exposing the junction regions; forming plugs in the contact holes; and implanting impurity ions into the plugs; and annealing the junction regions.
    Type: Application
    Filed: December 17, 2003
    Publication date: September 9, 2004
    Inventors: Seung Woo Jin, Tae Hyeok Lee, Bong Soo Kim
  • Publication number: 20040161890
    Abstract: The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.
    Type: Application
    Filed: November 26, 2003
    Publication date: August 19, 2004
    Applicant: Hynix Semiconductor Inc.
    Inventors: Chang Rock Song, Sang Ho Woo, Dong Su Park, Cheol Hwan Park, Tae Hyeok Lee
  • Publication number: 20040110341
    Abstract: A method for forming of a capacitor wherein an etching barrier layer comprising a stacked structure of a nitride film and a tantalum oxide film is disclosed. The method comprises the steps of: forming an etching barrier layer on an interlayer insulating film having a storage electrode contact plug therein, the etching barrier layer comprising a stacked structure of a nitride film and a tantalum oxide film; forming an oxide film on the etching barrier layer; selectively etching the oxide film and the etching barrier layer to form an opening exposing the storage electrode contact plug; depositing a storage electrode layer on the bottom and the inner walls of the opening; and removing the oxide film, whereby forming a storage electrode.
    Type: Application
    Filed: June 30, 2003
    Publication date: June 10, 2004
    Inventors: Dong Su Park, Tae Hyeok Lee, Cheol Hwan Park
  • Publication number: 20040082144
    Abstract: A method for forming a device isolation film of a semiconductor device, wherein an annealing process is performed on the oxide film using NH3 prior to the deposition of a liner nitride film and after the deposition of a thermal oxide film on a sidewall of a trench to nitridate the oxide film is disclosed.
    Type: Application
    Filed: June 23, 2003
    Publication date: April 29, 2004
    Inventors: Cheol Hwan Park, Dong Su Park, Tae Hyeok Lee, Sang Ho Woo
  • Publication number: 20040041191
    Abstract: A capacitor in a semiconductor device and a method for fabricating the same is disclosed. Disclosed the method for fabricating the capacitor in a semiconductor device comprises the steps of: forming a lower electrode made of doped silicon materials on a semiconductor substrate; depositing a thin silicon nitride layer on the lower electrode; forming a silicon oxynitride layer on the surface of the silicon nitride layer through oxidation of the silicon nitride layer; depositing a dielectric layer on the silicon oxynitride layer; and forming an upper electrode on the dielectric layer.
    Type: Application
    Filed: December 30, 2002
    Publication date: March 4, 2004
    Inventors: Cheol Hwan Park, Dong Su Park, Tae Hyeok Lee, Sang Ho Woo