Patents by Inventor Tae Hyeok Lee

Tae Hyeok Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040161890
    Abstract: The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.
    Type: Application
    Filed: November 26, 2003
    Publication date: August 19, 2004
    Applicant: Hynix Semiconductor Inc.
    Inventors: Chang Rock Song, Sang Ho Woo, Dong Su Park, Cheol Hwan Park, Tae Hyeok Lee
  • Publication number: 20040110341
    Abstract: A method for forming of a capacitor wherein an etching barrier layer comprising a stacked structure of a nitride film and a tantalum oxide film is disclosed. The method comprises the steps of: forming an etching barrier layer on an interlayer insulating film having a storage electrode contact plug therein, the etching barrier layer comprising a stacked structure of a nitride film and a tantalum oxide film; forming an oxide film on the etching barrier layer; selectively etching the oxide film and the etching barrier layer to form an opening exposing the storage electrode contact plug; depositing a storage electrode layer on the bottom and the inner walls of the opening; and removing the oxide film, whereby forming a storage electrode.
    Type: Application
    Filed: June 30, 2003
    Publication date: June 10, 2004
    Inventors: Dong Su Park, Tae Hyeok Lee, Cheol Hwan Park
  • Publication number: 20040082144
    Abstract: A method for forming a device isolation film of a semiconductor device, wherein an annealing process is performed on the oxide film using NH3 prior to the deposition of a liner nitride film and after the deposition of a thermal oxide film on a sidewall of a trench to nitridate the oxide film is disclosed.
    Type: Application
    Filed: June 23, 2003
    Publication date: April 29, 2004
    Inventors: Cheol Hwan Park, Dong Su Park, Tae Hyeok Lee, Sang Ho Woo
  • Publication number: 20040041191
    Abstract: A capacitor in a semiconductor device and a method for fabricating the same is disclosed. Disclosed the method for fabricating the capacitor in a semiconductor device comprises the steps of: forming a lower electrode made of doped silicon materials on a semiconductor substrate; depositing a thin silicon nitride layer on the lower electrode; forming a silicon oxynitride layer on the surface of the silicon nitride layer through oxidation of the silicon nitride layer; depositing a dielectric layer on the silicon oxynitride layer; and forming an upper electrode on the dielectric layer.
    Type: Application
    Filed: December 30, 2002
    Publication date: March 4, 2004
    Inventors: Cheol Hwan Park, Dong Su Park, Tae Hyeok Lee, Sang Ho Woo
  • Publication number: 20040023456
    Abstract: A method for fabricating a capacitor for a semiconductor device is disclosed, which comprises the steps of: forming a storage node electrode on a semiconductor wafer, forming a dielectric layer made of a cyclic silicon nitride layer on the surface of the storage node electrode, and forming an upper electrode on the dielectric layer; lowering the thickness Teff of the dielectric layer and improving leakage current characteristics through use of a cyclic Si3N4 or a cyclic SiOxNy (wherein x falls between 0.1 and 0.9 and y falls between 0.1 and 2), having a large oxidation resistance and high dielectric ratio, as a dielectric.
    Type: Application
    Filed: December 30, 2002
    Publication date: February 5, 2004
    Inventors: Tae Hyeok Lee, Cheol Hwan Park, Dong Su Park, Sang Ho Woo
  • Patent number: 6569728
    Abstract: A method for forming a capacitor by stacking impurity-doped polysilicon layers having different concentrations to form a bottom electrode, treating surfaces of the bottom electrode to prevent a low dielectric constant material from being generated on the surface of the bottom electrode, and forming a dielectric layer and a top electrode on the bottom electrode.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: May 27, 2003
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Tae-Hyeok Lee, Seung-Woo Jin, Hoon-Jung Oh
  • Patent number: 6541330
    Abstract: Disclosed are a capacitor for semiconductor device capable of increasing storage capacitance and preventing leakage current, and method of manufacturing the same. According to the present invention. A lower electrode is formed on a semiconductor substrate. The lower electrode is surface-treated so as to prevent generation of a natural oxide layer. An amorphous TaON layer is, as a dielectric layer, deposited on the upper part of the lower electrode. Afterwards, the amorphous TaON layer is thermal-treated in a range of maintaining its amorphous state. Next, an upper electrode is formed on the upper part of the TaON layer.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: April 1, 2003
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Kee Jeung Lee, Tae Hyeok Lee
  • Publication number: 20020025624
    Abstract: A method for manufacturing a capacitor for use in a semiconductor device comprises forming silicon plugs between junction regions and upper conductive structures by depositing an amorphous silicon layer on a semiconductor substrate and into the contact holes formed in an insulating layer using a low pressure chemical vapor deposition (LPCVD) method. The amorphous silicon layer is then crystallized in an inert gas ambient to form a crystallized silicon layer and a portion of the crystallized silicon layer is removed to expose a top surface of the interlayer insulating film and to form the silicon plugs. Upper conductive structures are then formed on the silicon plugs and a metastable polysilicon (MPS) layer is then selectively formed on the exposed surfaces of the conductive structure.
    Type: Application
    Filed: August 31, 2001
    Publication date: February 28, 2002
    Inventors: Hoon-Jung Oh, Se-Min Lee, Tae-Hyeok Lee, Il-Keoun Han
  • Publication number: 20020025648
    Abstract: A method for forming a capacitor by stacking impurity-doped polysilicon layers having different concentrations to form a bottom electrode, treating surfaces of the bottom electrode to prevent a low dielectric constant material from being generated on the surface of the bottom electrode, and forming a dielectric layer and a top electrode on the bottom electrode.
    Type: Application
    Filed: August 28, 2001
    Publication date: February 28, 2002
    Inventors: Tae-Hyeok Lee, Seung-Woo Jin, Hoon-Jung Oh
  • Patent number: 6337291
    Abstract: Disclosed herein is a method of forming a capacitor for a semiconductor memory device. The method comprises a step of:forming a lower electrode on the semiconductor substrate; forming an O3-oxide film on the lower electrode; forming Si—O—N bonds on the surface of the O3-oxide film; forming a TaON film on the Si—O—N bonds by a chemical vapor deposition of a Ta chemical vapor, an O2 gas and an NH3 gas; and forming an upper electrode on the TaON film.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: January 8, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Dong Su Park, Tae Hyeok Lee