Abstract: A flat panel display including a first substrate, a second substrate, a light emitting region between the first and second substrates, and a sealant applied outside of the light emitting region, wherein the sealant has a rectangular shape and includes a first sealing part and a third sealing part opposite each other, and a second sealing part and a fourth sealing part opposite each other, the first, second, third, and fourth sealing parts being interconnected, and wherein the flat panel display includes a compensating part corresponding to at least one of the first, second, third, and fourth sealing parts on or in the first or second substrate.

Abstract: The present invention discloses a method for inspecting the electrical performance of a flash memory cell, which comprises: performing electron-storage programming on a flash memory cell for a pre-determined period; screening out flash memory cells that reach a specified reference value as a mother batch of flash memory cells that meet the preliminary requirement, by measuring the threshold voltage; then performing a second electron-storage programming on the flash memory cells screened out for a certain time period; baking these flash memory cells; and finally, measuring the threshold voltage of these baked flash memory cells again and determining whether the threshold voltage can still be maintained at or above the reference value, so that it can be determined ultimately whether the flash memory cells meet the electrical performance requirements.

Abstract: An organic light emitting diode (OLED) display includes a display substrate assembly including an organic light emitting structure, an encapsulation substrate assembly disposed facing the display substrate assembly, a sealant disposed between the display substrate assembly and the encapsulation substrate assembly to seal the display substrate assembly and the encapsulation substrate assembly with each other, and a substrate deformation protection body disposed between the sealant and the organic light emitting structure.

Abstract: A method of reworking a semiconductor substrate and a method of forming a pattern of semiconductor device using the same without damage to an organic anti-reflective coating (ARC) is provided. The method of reworking a semiconductor substrate includes forming a photoresist pattern on a substrate having the organic ARC formed thereon. An entire surface of the substrate having the photoresist pattern formed thereon may be exposed when a defect is present in the photoresist pattern. The entire-surface-exposed photoresist pattern may be removed by performing a developing process without damage to the organic ARC.

Abstract: Provided is a method of manufacturing a high strength ferritic/martensitic steel. The method includes melting a ferritic/martensitic steel, hot-working the melted ferritic/martensitic steel, normalizing the hot-worked ferritic/martensitic steel at a temperature of about 1050° C. to about 1200° C., tempering the ferritic/martensitic steel at a temperature of about 600° C. or less, and leaving MX precipitates while preventing a M23C6 precipitate from being precipitated, and cold-working and thermal-treating the ferritic/martensitic steel in a multistage fashion, and precipitating M23C6 precipitates. Through the above described configuration, the high strength ferritic/martensitic steel that prevents a ductility from being deteriorated even in a high-temperature environment may be manufactured.

Abstract: A bake-hardenable high-strength cold-rolled steel sheet, a hot-dipped steel sheet thereof, and a method for manufacturing the same. The steel sheet comprises 0.0016˜0.01% of C; 0.1% or less of Si; 0.2˜1.5% of Mn; 0.05˜0.15% of P; 0.01% or less of S; 0.08˜0.5% of (soluble) Al; 0.0025% or less of N; 0.003˜0.1% of Nb; 0.003% or less of Ti; 0.01˜0.4% of Mo; 0.0005˜0.005% of B; and the balance of Fe and other unavoidable impurities, in terms of weight %. The method includes the steps of heating a steel slab of the above composition to a temperature of 1,200° C. or more; and then hot rolling the steel slab with finish rolling at or above the Ar3 temperature to provide a hot rolled steel sheet; coiling the hot rolled steel sheet; cold rolling the hot rolled and coiled sheet; and continuous annealing the cold rolled sheet.

Abstract: Disclosed herein are a nuclear fuel rod for fast reactors, which includes an oxide coating layer formed on the inner surface of a cladding, and a manufacturing method thereof. The nuclear fuel rod for fast reactors, which includes the oxide coating layer formed on the inner surface of the cladding, can increase the maximum permissible burnup and maximum permissible temperature of the metallic fuel slug for fast reactors so as to prolong the its lifecycle in the fast reactors, thus increasing economic efficiency. Also, the fuel rod is manufactured in a simpler manner compared to the existing method, in which a metal liner is formed, and the disclosed method enables the cladding of the fuel rod to be manufactured in an easy and cost-effective way.

Abstract: A method of reworking a semiconductor substrate and a method of forming a pattern of semiconductor device using the same without damage to an organic anti-reflective coating (ARC) is provided. The method of reworking a semiconductor substrate includes forming a photoresist pattern on a substrate having the organic ARC formed thereon. An entire surface of the substrate having the photoresist pattern formed thereon may be exposed when a defect is present in the photoresist pattern. The entire-surface-exposed photoresist pattern may be removed by performing a developing process without damage to the organic ARC.

Abstract: The present invention discloses a method for inspecting the electrical performance of a flash memory cell, which comprises: performing electron-storage programming on a flash memory cell for a pre-determined period; screening out flash memory cells that reach a specified reference value as a mother batch of flash memory cells that meet the preliminary requirement, by measuring the threshold voltage; then performing a second electron-storage programming on the flash memory cells screened out for a certain time period; baking these flash memory cells; and finally, measuring the threshold voltage of these baked flash memory cells again and determining whether the threshold voltage can still be maintained at or above the reference value, so that it can be determined ultimately whether the flash memory cells meet the electrical performance requirements.

Abstract: Disclosed herein are a bake-hardenable high-strength cold-rolled steel sheet, a hot-dipped steel sheet thereof, and a method for manufacturing the same. The steel sheet comprises 0.0016˜0.01% of C; 0.1% or less of Si; 0.2˜1.5% of Mn; 0.05˜0.15% of P; 0.01% or less of S; 0.08˜0.5% of (soluble) Al; 0.0025% or less of N; 0.003˜0.1% of Nb; 0.003% of less of Ti; 0.01˜0.4% of Mo; 0.0005˜0.005% of B; and the balance of Fe and other unavoidable impurities, in terms of weight %. The steel sheet has fine AlN precipitates, and a grain size (ASTM No.) of 9 or more. The AlN precipitates have a grain size, which can suppress grain growth. The steel sheet has enhanced strength, bake hardenability, aging resistance, and secondary work embrittlement resistance.

Abstract: The present invention relates to a CMP (chemical mechanical polishing) slurry composition and a method for planarizing a semiconductor device. The CMP composition comprises fumed silica, tetramethyl ammonium hydroxide, phosphates, fluorine compounds and deionized water. The method of planarizing comprises the steps of etching, subsequently laminating and polishing a semiconductor device by said CMP slurry composition.

Abstract: The present invention relates to a CMP (chemical mechanical polishing) slurry composition and a method for planarizing a semiconductor device. The CMP composition comprises fumed silica, tetramethyl ammonium hydroxide, phosphates, fluorine compounds and deionized water. The method of planarizing comprises the steps of etching, subsequently laminating and polishing a semiconductor device by said CMP slurry composition.

Abstract: This invention is a golf apparatus for protecting the golfer from increment weather. The golf apparatus combines the covering or shield with a detachable glove. The covering or shield includes an opening that is elastic for allowing the gloved hand to be revealed for adjusting the gloved hand to the club. After the gloved hand grips the club, the parallel slit allows the palm area of the ungloved hand to extent through the slit area to facilitate proper alignment of the hands.

Abstract: There is provided an electron gun for a cathode-ray tube, comprising a triode having a control electrode and an accelerating electrode for controlling the amount of electron beams emitted from a plurality of cathodes and accelerating the electron beams, a front focusing lens part configured of a plurality of electrodes focusing and accelerating a predetermined amount of the electron beams, and a main lens part configured of a plurality of electrodes for focusing the electron beams on a screen, in which the diameter of beam passage hole of the accelerating electrode of the triode corresponds to 140-220% of that of the control electrode. The thickness of the control electrode corresponds to 20-30% of the diameter of beam passage hole of the control electrode, and the distance between the control electrode and the accelerating electrode corresponds to 40-80% of the beam passage hole diameter of the control electrode.

Abstract: An electron gun is provided for a color CRT having a triode for emitting, controlling, and accelerating R, G, B beams, and main lens forming electrodes for focusing the R, G, B beams emitted from the triode onto a screen. The electron gun includes first dynamic quadrupole lens forming electrodes for providing a vertical focusing action and a horizontal focusing action to be applied to the R, G, B beams such that the vertical focusing action is different from the horizontal focusing action, and second dynamic quadrupole lens forming electrodes for providing horizontal/vertical focusing actions to be applied to the R, B beams, side beams, and horizontal/vertical focusing actions to be applied to the G beam, a center beam, the horizontal/vertical focusing actions to be applied to the R, B beams being different from the horizontal/vertical focusing actions to be applied to the G beam.

Abstract: There is disclosed a method of fabricating a piezoelectric ceramics. It can obtain a small grain size and a fine grain phase by forming a combined powder being major components, stirring the combined powder with (COOH)2 water solution, dropping a Pb(NO3)2 water solution into the stirred powder, and forming a PZT powder by calcinations and sintering processes.

Abstract: A method for testing a memory cell of the semiconductor device includes the steps of determining a reference memory cell and setting a first trip point by measuring a first drain current of a reference memory cell, testing an erasure verifying memory cell to be tested at a room temperature, detecting a fourth drain current by measuring the erasure verifying memory cell at a hot temperature and comparing the fourth drain current with the first drain current, varying the first drain trip point according to a current difference between the firs and the fourth drain currents and setting a second trip point of the erasure verifying memory cell according to the varied first trip point.

Abstract: A method for testing a memory cell of the semiconductor device includes the steps of determining a reference memory cell and setting a first trip point by measuring a first drain current of a reference memory cell, testing an erasure verifying memory cell to be tested at a room temperature, detecting a fourth drain current by measuring the erasure verifying memory cell at a hot temperature and comparing the fourth drain current with the first drain current, varying the first drain trip point according to a current difference between the firs and the fourth drain currents and setting a second trip point of the erasure verifying memory cell according to the varied first trip point.

Abstract: There is disclosed a method of improving an electrostatic discharge (“ESD”) characteristic in a flash memory device. In order to prevent generation of leak current caused when charges generated upon a testing of the ESD are introduced into an internal circuit, the prevent can prevent a current fail in the internal circuit, by connecting a drain junction power supply terminal and a ground terminal line, in the connection of an internal circuit and a SDA input buffer in a flash memory device, to connection terminals spaced apart to each other.

Abstract: There is disclosed a method of programming a flash memory cell, which is performed applying a given voltage a gate and a drain and maintaining a source and a substrate at a ground potential. The method variably applies a given voltage, with two or more steps, to one of the gate and drain terminals while applying a given voltage to the other of the gate and drain terminals, thus reducing the programming current per cell. Accordingly, the present invention can improve reliability and throughput of the flash memory cell.