Abstract: A semiconductor nanocrystal, wherein the semiconductor nanocrystal shows maximum luminescence peaks at two or more wavelengths and most of the atoms constituting the nanocrystal are present at the surface of the nanocrystal to form defects.

Abstract: A method of aligning a substrate includes forming a first alignment hole in the substrate, preparing a mask with a second alignment hole narrower than the first alignment hole, modifying a surface reflectance around either the first alignment hole or the second alignment hole to form a treatment region, positioning the mask below the substrate, such that the first and second alignment holes overlap, and operating a sensor unit above the first alignment hole to examine alignment of the first and second alignment holes.

Abstract: Provided is a chemical wet preparation method for Group 12-16 compound semiconductor nanocrystals. The method includes mixing one or more Group 12 metals or Group 12 precursors with a dispersing agent and a solvent followed by heating to obtain a Group 12 metal precursor solution; dissolving one or more Group 16 elements or Group 16 precursors in a coordinating solvent to obtain a Group 16 element precursor solution; and mixing the Group 12 metal precursors solution and the Group 16 element precursors solution to form a mixture, and then reacting the mixture to grow the semiconductor nanocrystals. The Group 12-16 compound semiconductor nanocrystals are stable and have high quantum efficiency and uniform sizes and shapes.

Abstract: A thin film transistor using an oxide semiconductor as an active layer, and its method of manufacture. The thin film transistor includes: a substrate; an active layer formed of an oxide semiconductor; a gate insulating layer formed of a dielectric on the active layer, the dielectric having an etching selectivity of 20 to 100:1 with respect to the oxide semiconductor; a gate electrode formed on the gate insulating layer; an insulating layer formed on the substrate including the gate electrode and having contact holes to expose the active layer; and source and drain electrodes connected to the active layer through the contact holes. Since the source and drain electrodes are not overlapped with the gate electrode, parasitic capacitance between the source and drain electrodes and the gate electrode is minimized. Since the gate insulating layer is formed of dielectric having a high etching selectivity with respect to oxide semiconductor, the active layer is not deteriorated.

Abstract: An oxide semiconductor thin film transistor and a flat panel display device incorporating the same oxide semiconductor thin film transistor. The thin film transistor includes a gate electrode formed on the substrate, a gate insulating layer formed on the substrate and covering the gate electrode, an oxide semiconductor layer formed on the gate insulating layer and covering the gate electrode, a titanium layer formed in a source region and a drain region of the oxide semiconductor layer, and source and drain electrodes respectively coupled to the source region and the drain region through the titanium layer and made of copper. The titanium layer reduces the contact resistance between the source and drain electrodes made of copper and the oxide semiconductor layer, forms a stable interface junction therebetween, and blocks a diffusion of copper.

Abstract: Disclosed is an organic light emitting display device and a method of manufacturing the same. The organic light emitting display device includes the thin film transistor of the drive unit that has the activation layer formed in a structure where the first oxide semiconductor layer and the second oxide semiconductor layer are stacked, the thin film transistor of the pixel unit that has the activation layer formed of the second oxide semiconductor layer, and the organic light emitting diode coupled to the thin film transistor of the pixel unit. The thin film transistor of the drive unit has channel formed on the first oxide semiconductor layer having a higher carrier concentration than the second oxide semiconductor layer, having a high charge mobility, and the thin film transistor of the pixel unit has a channel formed on the second oxide semiconductor layer, having a stable and uniform functional property.

Abstract: A nanocrystal electroluminescence device comprising a polymer hole transport layer, a nanocrystal light-emitting layer and an organic electron transport layer wherein the nanocrystal light-emitting layer is independently and separately formed between the polymer hole transport layer and the organic electron transport layer. According to the nanocrystal electroluminescence device, since the hole transport layer, the nanocrystal light-emitting layer and the electron transport layer are completely separated from one another, the electroluminescence device provides a pure nanocrystal luminescence spectrum having limited luminescence from other organic layers and substantially no influence by operational conditions, such as voltage. Further, a method for fabricating the nanocrystal electroluminescence device.

Abstract: A cadmium sulfide nanocrystal, wherein the cadmium sulfide nanocrystal shows maximum luminescence peaks at two or more wavelengths and most of the atoms constituting the nanocrystal are present at the surface of the nanocrystal to form defects.

Abstract: Disclosed is a thin film transistor which has an oxide semiconductor as an activation layer, a method of manufacturing the same and a flat panel display device having the same. The thin film transistor includes an oxide semiconductor layer formed on a substrate and including a channel region, a source region and a drain region, a gate electrode insulated from the oxide semiconductor layer by a gate insulating film, and source electrode and drain electrode which are coupled to the source region and the drain region, respectively. The oxide semiconductor layer includes a first layer portion and a second layer portion. The first layer portion has a first thickness and a first carrier concentration, and the second layer portion has a second thickness and a second carrier concentration. The second carrier concentration is lower than the first carrier concentration.

Abstract: A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include source and drain electrodes formed on a substrate; an active layer formed of an oxide semiconductor disposed on the source and drain electrodes; a gate electrode; and an interfacial stability layer formed on at least one of top and bottom surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristics as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.

Abstract: A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include a gate electrode formed on a substrate; an active layer made of an oxide semiconductor and insulated from the gate electrode by a gate insulating layer; source and drain electrodes coupled to the active layer; and an interfacial stability layer formed on one or both surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristic as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.

Abstract: A cadmium sulfide nanocrystal, wherein the cadmium sulfide nanocrystal shows maximum luminescence peaks at two or more wavelengths and most of the atoms constituting the nanocrystal are present at the surface of the nanocrystal to form defects.

Abstract: A thin film transistor, including a transparent channel pattern, a transparent gate insulating layer in contact with the channel pattern, a passivation film pattern disposed on the channel pattern, a source/drain coupled to the channel pattern through a via hole in the passivation film pattern, and a gate facing the channel pattern, the gate insulating layer interposed between the gate and the channel pattern, wherein the passivation film pattern includes at least one of polyimide, photoacryl, and spin on glass (SOG).

Abstract: A method for preparing a multilayer of nanocrystals. The method includes the steps of (i) coating nanocrystals surface-coordinated by a photosensitive compound, or a mixed solution of a photosensitive compound and nanocrystals surface-coordinated by a material miscible with the photosensitive compound, on a substrate, drying the coated substrate, and exposing the dried substrate to UV light to form a first monolayer of nanocrystals, and (ii) repeating the procedure of step (i) to form one or more monolayers of nanocrystals on the first monolayer of nanocrystals. Further, an organic-inorganic hybrid electroluminescence device using a multilayer of nanocrystals prepared by the method as a luminescent layer. The luminescent efficiency and luminescence intensity of the electroluminescence device can be enhanced, and the electrical properties of the electroluminescence device can be controlled by the use of the multilayer of nanocrystals as a luminescent layer.

Abstract: A semiconductor nanocrystal, wherein the semiconductor nanocrystal shows maximum luminescence peaks at two or more wavelengths and most of the atoms constituting the nanocrystal are present at the surface of the nanocrystal to form defects

Abstract: A method for preparing a multilayer of nanocrystals. The method includes the steps of (i) coating nanocrystals surface-coordinated by a photosensitive compound, or a mixed solution of a photosensitive compound and nanocrystals surface-coordinated by a material miscible with the photosensitive compound, on a substrate, drying the coated substrate, and exposing the dried substrate to UV light to form a first monolayer of nanocrystals, and (ii) repeating the procedure of step (i) to form one or more monolayers of nanocrystals on the first monolayer of nanocrystals. Further, an organic-inorganic hybrid electroluminescence device using a multilayer of nanocrystals prepared by the method as a luminescent layer. The luminescent efficiency and luminescence intensity of the electroluminescence device can be enhanced, and the electrical properties of the electroluminescence device can be controlled by the use of the multilayer of nanocrystals as a luminescent layer.

Abstract: A method of manufacturing an IGZO active layer includes depositing ions including In, Ga, and Zn from a first target, and depositing ions including In from a second target having a different atomic composition from the first target. The deposition of ions from the second target may be controlled to adjust an atomic % of In in the IGZO layer to be about 45 atomic % to about 80 atomic %.

Abstract: Semiconductor nanocrystals surface-coordinated with a compound containing a photosensitive functional group, a photosensitive composition comprising semiconductor nanocrystals, and a method for forming semiconductor nanocrystal pattern by producing a film using the photosensitive semiconductor nanocrystals or the photosensitive composition, exposing the film to light and developing the exposed film, are provided. The semiconductor nanocrystal pattern exhibits luminescence characteristics comparable to the semiconductor nanocrystals before patterning and can be usefully applied to organic-inorganic hybrid electroluminescent devices.

Abstract: A method for preparing cadmium sulfide nanocrystals emitting light at multiple wavelengths. The method comprises the steps of (a) mixing a cadmium precursor and a dispersant in a solvent that weakly coordinates to the cadmium precursor, and heating the mixture to obtain a cadmium precursor solution, (b) dissolving a sulfur precursor in a solvent that weakly coordinates to the sulfur precursor to obtain a sulfur precursor solution, and (c) feeding the sulfur precursor solution to the heated cadmium precursor solution maintained at a high temperature to prepare cadmium sulfide crystals, and growing the cadmium sulfide crystals. Further, cadmium sulfide nanocrystals prepared by the method. The cadmium sulfide nanocrystals have uniform size and shape and can emit light close to white light simultaneously at different wavelengths upon excitation. Due to these characteristics, the cadmium sulfide nanocrystals can be applied to white light-emitting diode devices.

Abstract: A flexible substrate bonding and debonding apparatus is disclosed. In one embodiment, the apparatus includes i) a chamber, ii) a lower chuck disposed in a lower portion of the chamber and having a lower heating unit and a cooling conduit built therein, iii) an upper chuck disposed above the lower chuck and having an upper heating unit built therein, iv) a pressurizing unit disposed above the upper chuck and v) a separating unit corresponding to either side of bonding surfaces of a support substrate and a flexible substrate which are disposed between the lower chuck and the upper chuck. The flexible substrate bonding and debonding apparatus can pressurize the flexible substrate and the support substrate simultaneously using a heat-treatment process. Therefore, the flexible substrate can be more reliably bonded and debonded even at low temperature.