Patents by Inventor Tae-Wan Lim

Tae-Wan Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120164831
    Abstract: Methods of forming a semiconductor device are provided. The methods may include forming a second insulation pattern on a first insulation pattern. The first insulation pattern may cover a plurality of conductive structures, and may include a hole therein. The second insulation pattern may include a trench therein that is connected with the hole. The methods may also include forming a spacer on sidewalls of the hole and the trench. The methods may further include forming a wiring structure in the hole and the trench.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 28, 2012
    Inventors: Sun-Young Kim, Jun-Eui Song, Tae-Wan Lim
  • Publication number: 20110201189
    Abstract: Provided are a semiconductor device and a method of forming the semiconductor device. The semiconductor device includes an active region of which an edge is curved. The semiconductor device includes a gate insulating layer, a floating gate, a gate interlayer dielectric layer and a control gate line on the active region. The semiconductor device includes an oxide pattern having a concave top surface between adjacent floating gates. The control gate may be sufficiently spaced apart from the active region by the oxide pattern. The method can provide a semiconductor device that includes a reoxidation process, an active region having a curved edge and an oxide pattern having a top surface of a curved concave shape.
    Type: Application
    Filed: April 26, 2011
    Publication date: August 18, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Yeol Byun, Chan-Kwang Park, Jae-Hwan Moon, Tae-Wan Lim, Seung-Ah Kim
  • Patent number: 7952134
    Abstract: Provided are a semiconductor device and a method of forming the semiconductor device. The semiconductor device includes an active region of which an edge is curved. The semiconductor device includes a gate insulating layer, a floating gate, a gate interlayer dielectric layer and a control gate line on the active region. The semiconductor device includes an oxide pattern having a concave top surface between adjacent floating gates. The control gate may be sufficiently spaced apart from the active region by the oxide pattern. The method can provide a semiconductor device that includes a reoxidation process, an active region having a curved edge and an oxide pattern having a top surface of a curved concave shape.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: May 31, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Yeol Byun, Chan-Kwang Park, Jae-Hwan Moon, Tae-Wan Lim, Seung-Ah Kim
  • Publication number: 20090102009
    Abstract: Provided are a semiconductor device and a method of forming the semiconductor device. The semiconductor device includes an active region of which an edge is curved. The semiconductor device includes a gate insulating layer, a floating gate, a gate interlayer dielectric layer and a control gate line on the active region. The semiconductor device includes an oxide pattern having a concave top surface between adjacent floating gates. The control gate may be sufficiently spaced apart from the active region by the oxide pattern. The method can provide a semiconductor device that includes a reoxidation process, an active region having a curved edge and an oxide pattern having a top surface of a curved concave shape.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 23, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ki-Yeol Byun, Chan-Kwang Park, Jae-Hwan Moon, Tae-Wan Lim, Seung-Ah Kim