Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.

Abstract: A liquid crystal display (LCD) device comprises a first pixel area; a second pixel area that is smaller than the first pixel area; a first pixel electrode formed in the first pixel area and having a first size; a first common electrode formed in the first pixel area, the first common electrode overlapping the first pixel electrode by a first overlap area; a second pixel electrode formed in the second pixel area and having a second size that is smaller than the first size of the first pixel electrode; a second common electrode formed in the second pixel area, the second common electrode overlapping the second pixel electrode by a second overlap area; wherein the first overlap area and the second overlap area are substantially the same.

Abstract: Disclosed is an LCD device having a dual link structure and a method of manufacturing the same, which can reduce a width of a bezel. A link line structure includes a plurality of first and second link lines which are alternately disposed. The first and second link lines are formed on different layers. Also, embodiments herein provide a method which can reduce the number of masks used in a manufacturing process and can easily manufacture the LCD device in consideration of the possibility of misalignment of exposure equipment.

Abstract: An array substrate includes: a substrate; a gate connecting line on the substrate in a gate circuit area; a gate insulating layer on the gate connecting line; an active pattern on the gate insulating layer; a source connecting line and a pixel pattern sequentially disposed on the active pattern; an interlayer insulating layer and an organic pattern sequentially disposed on the gate insulating layer; a first passivation layer on the organic pattern; and a conductive pattern on the first passivation layer, the conductive pattern coupled to the gate connecting line and to the pixel pattern.

Abstract: Disclosed is an LCD device having a dual link structure and a method of manufacturing the same, which can reduce a width of a bezel. A link line structure includes a plurality of first and second link lines which are alternately disposed. The first and second link lines are formed on different layers. Also, embodiments herein provide a method which can reduce the number of masks used in a manufacturing process and can easily manufacture the LCD device in consideration of the possibility of misalignment of exposure equipment.

Abstract: Disclosed is an LCD device having a dual link structure and a method of manufacturing the same, which can reduce a width of a bezel. A link line structure includes a plurality of first and second link lines which are alternately disposed. The first and second link lines are formed on different layers. Also, embodiments herein provide a method which can reduce the number of masks used in a manufacturing process and can easily manufacture the LCD device in consideration of the possibility of misalignment of exposure equipment.

Abstract: An array substrate includes: a substrate; a gate connecting line on the substrate in a gate circuit area; a gate insulating layer on the gate connecting line; an active pattern on the gate insulating layer; a source connecting line and a pixel pattern sequentially disposed on the active pattern; an interlayer insulating layer and an organic pattern sequentially disposed on the gate insulating layer; a first passivation layer on the organic pattern; and a conductive pattern on the first passivation layer, the conductive pattern coupled to the gate connecting line and to the pixel pattern.

Abstract: A liquid crystal display (LCD) device comprises a first pixel area; a second pixel area that is smaller than the first pixel area; a first pixel electrode formed in the first pixel area and having a first size; a first common electrode formed in the first pixel area, the first common electrode overlapping the first pixel electrode by a first overlap area; a second pixel electrode formed in the second pixel area and having a second size that is smaller than the first size of the first pixel electrode; a second common electrode formed in the second pixel area, the second common electrode overlapping the second pixel electrode by a second overlap area; wherein the first overlap area and the second overlap area are substantially the same.

Abstract: A display device and a fabrication method thereof are provided. In a dual-link structure for a narrow bezel, first link wirings are formed on the same layer that the gate lines are formed and second link wirings are formed on the same layer that the data lines are formed. The first link wirings and the second link wirings are formed in a non-display area. Or auxiliary link wirings are further formed over the first link wirings and the second link wirings respectively. Or the first link wiring and second link wiring are divided two pieces of sub-link wirings. The sub-link wirings consisting the one link wiring are connected respectively and are formed on the different layer, whereby a defective image due to a difference in resistance between neighboring link wirings can be improved.

Abstract: Disclosed is an LCD device having a dual link structure and a method of manufacturing the same, which can reduce a width of a bezel. A link line structure includes a plurality of first and second link lines which are alternately disposed. The first and second link lines are formed on different layers. Also, embodiments herein provide a method which can reduce the number of masks used in a manufacturing process and can easily manufacture the LCD device in consideration of the possibility of misalignment of exposure equipment.

Abstract: A display device and a fabrication method thereof are provided. In a dual-link structure for a narrow bezel, first link wirings are formed on the same layer that the gate lines are formed and second link wirings are formed on the same layer that the data lines are formed. The first link wirings and the second link wirings are formed in a non-display area. Or auxiliary link wirings are further formed over the first link wirings and the second link wirings respectively. Or the first link wiring and second link wiring are divided two pieces of sub-link wirings. The sub-link wirings consisting the one link wiring are connected respectively and are formed on the different layer, whereby a defective image due to a difference in resistance between neighboring link wirings can be improved.

Abstract: A liquid crystal display device includes a first substrate, a second substrate and a liquid crystal layer between the first and second substrates. The liquid crystal display device further includes a gate line on the first substrate, a first insulation film on the gate line, a data line crossing the gate line such that the data line and the gate line define a pixel region with a transmission area and a reflection area, a thin film transistor connected to the gate line and the data line, a storage capacitor including a storage line crossing the data line and an upper storage electrode connected to the thin film transistor, a second insulation film on the thin film transistor with a transmission hole defined through the second insulation film, a reflection electrode disposed on the second insulation film in the reflection area and connected to a portion of the upper storage electrode through the transmission hole, and a pixel electrode disposed in the pixel region and connected to the reflection electrode.

Abstract: The LCD device comprises a display region defined by a plurality of gate and data lines, and having a plurality of thin film transistors (TFTs), for displaying an image; a frame region disposed outside the display region, and composed of a first region having a reflection layer for displaying a color having a set brightness by reflecting incident light in a reflective mode, and a second region having a driving circuit pattern and a driving circuit for shielding incident light; and an outer region formed outside the frame region and having the driving circuit.

Abstract: A liquid crystal display device is provided that comprises a gate line; a first insulating film on the gate line; a data line crossing the gate line to define a pixel region, the pixel region having a transmissive area and a reflective area; a thin film transistor connected to the gate line and the data line; a pixel electrode formed in the pixel region; a second insulating film on the thin film transistor; a storage capacitor including a storage upper electrode overlapping the gate line; a transmission hole exposing at least a portion of the pixel electrode, and a reflective electrode formed in the reflective area of the pixel region, the reflective electrode connecting the pixel electrode with thin film transistor and the storage upper electrode, wherein the gate line and the pixel electrode include a first transparent conductive layer.

Abstract: A liquid crystal display (LCD) device having a minimized display area. The LCD device comprises a display region defined by a plurality of gate and data lines, and having a plurality of thin film transistors (TFTs), for displaying an image; a frame region disposed outside the display region, and composed of a first region having a reflection layer for displaying a color having a set brightness by reflecting incident light in a reflective mode, and a second region having a driving circuit pattern and a driving circuit for shielding incident light; and an outer region formed outside the frame region and having the driving circuit.

Abstract: A liquid crystal display device is provided that comprises a gate line; a first insulating film on the gate line; a data line crossing the gate line to define a pixel region, the pixel region having a transmissive area and a reflective area; a thin film transistor connected to the gate line and the data line; a pixel electrode formed in the pixel region; a second insulating film on the thin film transistor; a storage capacitor including a storage upper electrode overlapping the gate line; a transmission hole exposing at least a portion of the pixel electrode, and a reflective electrode formed in the reflective area of the pixel region, the reflective electrode connecting the pixel electrode with thin film transistor and the storage upper electrode, wherein the gate line and the pixel electrode include a first transparent conductive layer.

Abstract: A liquid crystal display device is provided that comprises a gate line; a first insulating film on the gate line; a data line crossing the gate line to define a pixel region, the pixel region having a transmissive area and a reflective area; a thin film transistor connected to the gate line and the data line; a pixel electrode formed in the pixel region; a second insulating film on the thin film transistor; a storage capacitor including a storage upper electrode overlapping the gate line; a transmission hole exposing at least a portion of the pixel electrode, and a reflective electrode formed in the reflective area of the pixel region, the reflective electrode connecting the pixel electrode with thin film transistor and the storage upper electrode, wherein the gate line and the pixel electrode include a first transparent conductive layer.

Abstract: A TFT substrate having a storage capacitor with an increased capacitance and aperture ratio, and a simplified method of fabricating the same, includes gate and data lines crossing each other to define pixel areas; a gate insulating film between the gate and data lines; TFTs connected to the gate and data lines; a semiconductor pattern defining a channel of the TFTs and overlapped by the data lines; a passivation film covering the data lines and the TFTs; and at least one pixel electrode connected to a TFT and provided within a pixel hole that is arranged within a pixel area. The pixel hole is formed through the passivation film and partially through the gate insulating film. Further, a storage capacitor includes a portion of the pixel electrode that overlaps with an underlying gate line with a portion of the gate insulating film that defines the pixel hole.

Abstract: A thin film transistor substrate and method of fabrication is presented. The thin film transistor includes gate and data lines forming a pixel area and separated by a gate insulating layer on a LCD substrate. A thin film transistor in the pixel area has a semiconductor pattern which forms a channel. A pixel electrode in the pixel area contains a transparent conductive film. A gate metal film is adjacent to a portion of transparent conductive film in the pixel area. A semiconductor passivation film is formed by exposing the semiconductor in the channel to an oxygen or nitrogen plasma. A gate pad connected with the gate line contains the transparent film in a pad section and the transparent film and the gate film in a connection area connecting the gate pad and the gate line. A data pad connected with the data line contains the transparent film.

Abstract: This invention relates to a liquid crystal display device that is adaptive for being made in small size as well as shortening process time, and a fabricating method thereof. A liquid crystal display device according to an embodiment of the present invention includes an upper substrate where a common electrode is formed; a lower substrate that faces the upper substrate; a plurality of gate drive integrated circuits that supplies a gate signal to a gate line that is located on the lower substrate; a plurality of data drive integrated circuits that supplies a data signal to a data line that is located on the lower substrate; a common line that supplies a common voltage to the common electrode through the gate drive integrated circuit and the data drive integrated circuit when driving a liquid crystal; and a conductive sealant that electrically connects the common electrode to the common line in one of an area of between adjacent gate drive integrated circuits and between adjacent data drive integrated circuits.