Abstract: Operating a selector device that controls access of a signal to a memory element may comprise applying a main operating voltage pulse and a refresh voltage pulse to the selector device. The refresh voltage pulse and main operating voltage pulse have opposite polarities. A magnitude of the main operating voltage pulse is greater than or equal to a threshold voltage for turning on the selector device, and a maximum magnitude of the refresh voltage pulse is less than the threshold voltage. The refresh voltage pulse reduces a difference between the threshold voltage and a turn-off voltage of the selector device, and may be applied immediately before or immediately after the main operating voltage pulse. An electronic circuit may include the selector device and a driving circuit for apply the pulses. A nonvolatile memory may include the driving circuit and a plurality of nonvolatile memory elements each including a selector device.

Abstract: A semiconductor device includes: a selector pattern including an insulating material having dopants implanted to the insulating material along an implantation direction and having a first sidewall and a second sidewall facing the first sidewall, the selector pattern configured to exhibit different electrical conducting characteristics in response to an applied voltage with respect to a threshold voltage; and a first electrode layer and a second electrode layer respectively formed over the first sidewall and the second sidewall of the selector pattern, wherein the implantation direction of the dopants is different from a direction of a current flowing through the selector pattern between the first electrode layer and the second electrode layer when the selector pattern is turned on.

Abstract: Memory devices and operating methods are disclosed. In an embodiment, a memory device may include a memory cell array including a plurality of memory cells, each of the plurality of memory cells configured to store a data value corresponding to read data to be read out through a plurality of conductive lines, and a read circuit connected to the plurality of conductive to generate the read data corresponding to the data value stored in a selected memory cell among the plurality of memory cells based on or according to whether there is a change in a cell current flowing through the selected memory cell during a single read period.

Abstract: A printed circuit board includes a first substrate portion including a plurality of first insulating layers, a plurality of first wiring layers respectively disposed on the plurality of first insulating layers, and a plurality of first adhesive layers respectively disposed between the plurality of first insulating layers to respectively cover the plurality of first wiring layers; and a second substrate portion disposed on the first substrate portion, and including a plurality of second insulating layers, a plurality of second wiring layers respectively disposed on the plurality of second insulating layers, and a plurality of second adhesive layers respectively disposed between the plurality of second insulating layers to respectively cover the plurality of second wiring layers.

Abstract: A semiconductor device includes: a first contact plug disposed over the substrate; two or more insulating patterns disposed on a side surface of the first contact plug and sequentially along a direction away from the first contact plug; and a memory pattern connected to the first contact plug, wherein an upper surface of the first contact plug and upper surfaces of the insulating patterns form an inclined surface whose height decreases as a distance from a center of the first contact plug increases, the inclined surface includes a first inclined surface disposed on a first side of the center of the first contact plug and a second inclined surface disposed on second side of the center of the first contact plug, the second side opposite to the first side, and the memory pattern has a lower surface in contact with the first inclined surface.

Abstract: Semiconductor devices and fabrication methods of semiconductor devices are disclosed. In an embodiment, a semiconductor device May include a plurality of memory cells, and each of the plurality of memory cells may include: a resistive layer including a material having a specific resistance and including a lower portion and an upper portion disposed over the lower portion, wherein a width of the lower portion is smaller than a width of an uppermost surface of the upper portion; a selector layer disposed over the resistive layer and structured to perform a threshold switching by exhibiting different electrically conductive states in response to an applied voltage relative to a threshold voltage; and a memory layer disposed over the selector layer and structured to store data.

Abstract: Proposed is a method for estimating the mass of microplastics by using fluorescent staining. The method may include staining microplastic samples by using a Nile red solution, and capturing a fluorescent image of each of the stained microplastic samples after classifying the stained microplastic samples by mass. The method may also include analyzing the captured fluorescent image to quantify a fluorescence intensity thereof to build a database (DB) about a correlation between mass and fluorescence intensity of microplastics. The method may further include estimating a mass value of an unknown microplastic sample by comparing a fluorescence intensity of a fluorescent image of the unknown microplastic sample obtained by performing the staining and capturing of the unknown microplastic sample with data stored in the database.

Abstract: A semiconductor device may include: first conductive lines extending in a first direction; second conductive lines extending a second direction crossing the first direction; a plurality of first memory cells disposed at first intersections of the first conductive lines and the second conductive lines, respectively, each first memory cell including a first memory layer and a first selector layer that is disposed over the first memory layer; and a plurality of second memory cells disposed at second intersections of the first conductive lines and the second conductive lines, each second memory cell including a second selector layer and a second memory layer that is disposed over the second selector layer, wherein each of the first memory cells and each of the second memory cells are alternately disposed along the first direction and the second direction.

Abstract: A semiconductor device may include: a first conductive line extending in a first direction; a second conductive line disposed over the first conductive line to be spaced apart from the first conductive line and extending in a second direction different from the first direction; and a selector layer disposed between the first conductive line and the second conductive line and extending in a direction crossing at least one of the first direction or the second direction, wherein the selector layer includes a trench formed on a surface of the selector layer and extending in the direction crossing at least one of the first direction or the second direction.

Abstract: An electronic device may include a semiconductor memory structured to include a plurality of memory cells, wherein each of the plurality of memory cells may comprise: a first electrode layer; a second electrode layer; and a selection element layer disposed between the first electrode layer and the second electrode layer to electrically couple or decouple an electrical connection between the first electrode layer and the second electrode layer based on a magnitude of an applied voltage or an applied current with respect to a threshold magnitude, wherein the selection element layer has a dopant concentration profile which decreases from an interface between the selection element layer and the first electrode layer toward an interface between the selection element layer and the second electrode layer.

Abstract: A semiconductor device may include: a plurality of first conductive lines extending in a first direction; a plurality of second conductive lines spaced apart from the first conductive lines and extending in a second direction intersecting the first direction; and a plurality of memory cells respectively disposed to overlap intersection regions of the plurality of the first conductive lines and the plurality of the second conductive lines; and a layer structured to include an insulating material containing metal ions and formed between each memory cell and at least one of a first conductive line and a second conductive line that intersects with each other at a memory cell.

Abstract: Disclosed are a method of operating a selector device, a method of operating a nonvolatile memory apparatus to which the selector device is applied, an electronic circuit device including the selector device, and a nonvolatile memory apparatus. The method of operating the selector device controls access to a memory element, and includes providing the selector device including a switching layer and first and second electrodes disposed on both surfaces of the switching layer, which includes an insulator and a metal element, and applying a multi-step voltage pulse to the switching layer via the first and second electrodes to adjust a threshold voltage of the selector device, the multi-step voltage pulse including a threshold voltage control pulse and an operating voltage pulse. The operating voltage pulse has a magnitude for turning on the selector device, and the threshold voltage control pulse has a lower magnitude lower than the operating voltage pulse.

Abstract: A semiconductor device may include a word line, a bit line crossing the word line, and a memory cell coupled to the word line and the bit line to receive an electrical signal to control the memory cell and including a switching material layer and an oxidation-reduction reversible material layer that is in contact with the switching material layer to allow for either oxidation reaction or reduction reaction to occur in response to different amplitudes and different polarities of the electrical signal, wherein the oxidation-reduction reversible material layer and the switching material layer responds to a first threshold voltage and a first polarity of the electrical signal to generate an oxidation interface between the switching material layer and the oxidation-reduction reversible material layer, and responds to a second threshold voltage and a second polarity of the electrical signal to reduce the generation of the oxidation interface.

Abstract: Operating a selector device that controls access of a signal to a memory element may comprise applying a main operating voltage pulse and a refresh voltage pulse to the selector device. The refresh voltage pulse and main operating voltage pulse have opposite polarities. A magnitude of the main operating voltage pulse is greater than or equal to a threshold voltage for turning on the selector device, and a maximum magnitude of the refresh voltage pulse is less than the threshold voltage. The refresh voltage pulse reduces a difference between the threshold voltage and a turn-off voltage of the selector device, and may be applied immediately before or immediately after the main operating voltage pulse. An electronic circuit may include the selector device and a driving circuit for apply the pulses. A nonvolatile memory may include the driving circuit and a plurality of nonvolatile memory elements each including a selector device.

Abstract: An electronic device may include a semiconductor memory structured to include a plurality of memory cells, wherein each of the plurality of memory cells may comprise: a first electrode layer; a second electrode layer; and a selection element layer disposed between the first electrode layer and the second electrode layer to electrically couple or decouple an electrical connection between the first electrode layer and the second electrode layer based on a magnitude of an applied voltage or an applied current with respect to a threshold magnitude, wherein the selection element layer has a dopant concentration profile which decreases from an interface between the selection element layer and the first electrode layer toward an interface between the selection element layer and the second electrode layer.

Abstract: An electronic device may include a semiconductor memory structured to include a plurality of memory cells, wherein each of the plurality of memory cells may comprise: a first electrode layer; a second electrode layer; and a selection element layer disposed between the first electrode layer and the second electrode layer to electrically couple or decouple an electrical connection between the first electrode layer and the second electrode layer based on a magnitude of an applied voltage or an applied current with respect to a threshold magnitude, wherein the selection element layer has a dopant concentration profile which decreases from an interface between the selection element layer and the first electrode layer toward an interface between the selection element layer and the second electrode layer.

Abstract: A method for fabricating a semiconductor device may include: forming a first line over a substrate; forming a variable resistance layer on the first line; forming a first dielectric layer on the first line and the variable resistance layer; forming a second dielectric layer on the first dielectric layer; removing a portion of the interlayer dielectric layer to expose a portion of the first dielectric layer; and incorporating a dopant into an exposed portion of the first dielectric layer by performing an ion implantation process to convert the portion of the first dielectric layer into a selector layer.

Abstract: A semiconductor device that includes: first conductive lines; second conductive lines disposed over the first lines to be spaced apart from the first lines; and a selector layer disposed between the first lines and the second lines and including a dielectric material and a dopant doped with a uniform dopant profile.

Abstract: Disclosed are a method of operating a selector device, a method of operating a nonvolatile memory apparatus to which the selector device is applied, an electronic circuit device including the selector device, and a nonvolatile memory apparatus. The method of operating the selector device controls access to a memory element, and includes providing the selector device including a switching layer and first and second electrodes disposed on both surfaces of the switching layer, which includes an insulator and a metal element, and applying a multi-step voltage pulse to the switching layer via the first and second electrodes to adjust a threshold voltage of the selector device, the multi-step voltage pulse including a threshold voltage control pulse and an operating voltage pulse. The operating voltage pulse has a magnitude for turning on the selector device, and the threshold voltage control pulse has a lower magnitude lower than the operating voltage pulse.

Abstract: A method for fabricating a semiconductor device may include forming a stopper layer; forming an intermediate pattern material layer over the stopper layer; forming a plurality of first preliminary intermediate patterns by patterning the intermediate pattern material layer; forming a plurality of second preliminary intermediate patterns by shrinking the first preliminary intermediate patterns; forming a conductive material layer to cover the second preliminary intermediate patterns; forming a plurality of preliminary conductive interconnection patterns by patterning the conductive material layer; forming a filling layer between the preliminary conductive interconnection patterns; and forming a plurality of intermediate patterns, a plurality of conductive interconnection patterns and a plurality of filling patterns by removing top portions of the filling layer, the preliminary conductive interconnection patterns and the second preliminary intermediate patterns.