Patents by Inventor Taek Jung Lee

Taek Jung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180090275
    Abstract: A multilayer capacitor includes a body including dielectric layers, and first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween, first and second groove parts formed in external surfaces of the body in a first direction in which the dielectric layers are stacked, having at least one corner, and contacting the first and second internal electrodes, respectively, and first and second connection electrodes disposed in the first and second groove parts, respectively, and electrically connected to the first and second internal electrodes, respectively.
    Type: Application
    Filed: April 11, 2017
    Publication date: March 29, 2018
    Inventors: Won Young LEE, Sung Kwon AN, Taek Jung LEE, Jin Kyung JOO, Hyo Youn LEE
  • Publication number: 20180068793
    Abstract: A capacitor component includes a body, a plurality of internal electrodes disposed in the body, connection electrodes extended in a thickness direction of the body and electrically connected to the plurality of internal electrodes, upper electrodes disposed on an upper surface of the body and electrically connected to the connection electrodes, and lower electrodes disposed on a lower surface of the body and electrically connected to the connection electrodes A thickness of the upper electrodes is different from that of the lower electrodes, and an area of contact between the upper electrodes and the body is different from an area of contact between the lower electrodes and the body.
    Type: Application
    Filed: April 12, 2017
    Publication date: March 8, 2018
    Inventors: Taek Jung LEE, Hyo Youn LEE, Won Young LEE, Sung Kwon AN, Jae Yeol CHOI, Jin Kyung JOO
  • Publication number: 20180068794
    Abstract: A capacitor component includes a plurality of unit laminates, each comprising a body with a stacked structure including a plurality of internal electrodes and connection electrodes that extend in a stacking direction of the body and electrically connect to the plurality of internal electrodes, and pad portions between adjacent unit laminates to electrically connect the respective connection electrodes of the unit laminates above and below the pad portions to each other.
    Type: Application
    Filed: April 14, 2017
    Publication date: March 8, 2018
    Inventors: Taek Jung LEE, Jin Kyung JOO, Hyo Youn LEE, Won Young LEE, Sung Kwon AN, Jae Yeol CHOI, Jin Man JUNG
  • Publication number: 20180027656
    Abstract: A capacitor includes a body including a plurality of dielectric layers, first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween, and first and second insulating regions. The first insulating region is disposed in each of the first internal electrodes and includes a first connection electrode disposed therein. The second insulating region is disposed in each of the second internal electrodes and includes a second connection electrode disposed therein. The products D1×Td and D2×Td are greater than 20 ?m2, where Td is a thickness of the dielectric layer, and D1 and D2 are widths of the first and second insulating regions, respectively.
    Type: Application
    Filed: March 3, 2017
    Publication date: January 25, 2018
    Inventors: Jin Man JUNG, Jin Kyung JOO, Ik Hwan CHANG, Taek Jung LEE, Won Young LEE, Yong Won SEO, Jin Woo CHUN
  • Publication number: 20170349493
    Abstract: An insulator composition includes Al2O3 having a particle size of 120 to 500 nm. The insulator composition has a strength of 400 to 740 MPa and a particle size of 1 ?m or less.
    Type: Application
    Filed: November 18, 2016
    Publication date: December 7, 2017
    Inventors: Jin Kyung JOO, Yong Suk KIM, Taek Jung LEE, Doo Young KIM, Ik Hwan CHANG
  • Publication number: 20170245375
    Abstract: A multilayer ceramic substrate includes stacked ceramic layers, and external electrodes including first conductive layers penetrating through one region of an outermost layer of the stacked ceramic layers to thereby be embedded therein, and second and third conductive layers sequentially stacked on the first conductive layers. Each of the first and second conductive layers is formed of a ceramic powder and a metal powder.
    Type: Application
    Filed: May 8, 2017
    Publication date: August 24, 2017
    Inventors: Taek Jung LEE, Yong Suk KIM
  • Publication number: 20160225524
    Abstract: A method of manufacturing a multilayer ceramic electronic component includes preparing a multilayer structure in which dielectric layers containing an alumina base material and internal electrode layers containing nickel are alternately stacked, plasticizing the multilayer structure by heating to a temperature of 500 to 900° C. at a first heating rate under a first reducing atmosphere at a first hydrogen concentration, sintering the multilayer structure by heating to a temperature of 1,250° C. to 1,400° C. at a second heating rate greater than the first heating rate under a second reducing atmosphere at a second hydrogen concentration higher than the first hydrogen concentration, and then maintaining the temperature of 1,250° C. to 1,400° C., and annealing the multilayer structure by cooling the multilayer structure to room temperature at a first cooling rate.
    Type: Application
    Filed: December 28, 2015
    Publication date: August 4, 2016
    Inventors: Jin Kyung JOO, Byoung Hwa LEE, Tae Ho KIM, Doo Young KIM, Taek Jung LEE, Sin Il GU
  • Publication number: 20160157341
    Abstract: A multilayer ceramic substrate includes stacked ceramic layers, and external electrodes including first conductive layers penetrating through one region of an outermost layer of the stacked ceramic layers to thereby be embedded therein, and second and third conductive layers sequentially stacked on the first conductive layers. Each of the first and second conductive layers is formed of a ceramic powder and a metal powder.
    Type: Application
    Filed: October 19, 2015
    Publication date: June 2, 2016
    Inventors: Taek Jung LEE, Yong Suk KIM
  • Publication number: 20160007486
    Abstract: There is provided a package substrate including: a substrate on which a circuit layer and an insulating layer are stacked; a metal post provided in an outside region of at least any one of an upper surface and a lower surface of the substrate; an electronic component mounted in a cavity formed by the metal post; and a metal lid bonded to an upper portion of the metal post.
    Type: Application
    Filed: June 29, 2015
    Publication date: January 7, 2016
    Inventors: Yong Suk KIM, Taek Jung LEE, Byeung Gyu CHANG, Doo Young KIM, Byoung Hwa LEE
  • Patent number: 9101064
    Abstract: Disclosed herein are a thin film electrode ceramic substrate and a method for manufacturing the same. The thin film electrode ceramic substrate includes: a ceramic substrate; one or more anti-etching metal layers formed in a surface of the ceramic substrate; thin film electrode pattern formed on the anti-etching metal layers; and a plating layer formed on the thin film electrode pattern, wherein respective edge portions of the thin film electrode pattern are contacted with the anti-etching metal layer, and thus, an undercut defect occurring between the surface of the ceramic substrate and the thin film electrode pattern and between the thin film electrode patterns due to an etchant can be prevented and the binding strength of the entire thin film electrode pattern can be enhanced, resulting in securing durability and reliability of the thin film electrode patterns.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: August 4, 2015
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Won Hee Yoo, Byeung Gyu Chang, Taek Jung Lee, Yun Hwi Park
  • Publication number: 20130032384
    Abstract: Disclosed herein are a thin film electrode ceramic substrate and a method for manufacturing the same. The thin film electrode ceramic substrate includes: a ceramic substrate; a thin film electrode pattern formed on the ceramic substrate; and a plating layer formed on the thin film electrode pattern, wherein the plating layer is formed above the thin film electrode pattern and on both lateral surfaces of the thin film electrode pattern. According to the present invention, an undercut defect occurring between the surface of the ceramic substrate and the thin film electrode pattern and between the thin film electrode patterns due to an etchant can be prevented, by forming a plating layer above the thin film electrode pattern or on both lateral surfaces of the thin film electrode pattern, or forming an intaglio type anti-etching metal layer in the surface of the ceramic substrate.
    Type: Application
    Filed: August 2, 2012
    Publication date: February 7, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Won Hee Yoo, Byeung Gyu Chang, Taek Jung Lee, Yun Hwi Park
  • Publication number: 20130032383
    Abstract: Disclosed herein are a thin film electrode ceramic substrate and a method for manufacturing the same. The thin film electrode ceramic substrate includes: a ceramic substrate; one or more anti-etching metal layers formed in a surface of the ceramic substrate; thin film electrode pattern formed on the anti-etching metal layers; and a plating layer formed on the thin film electrode pattern, wherein respective edge portions of the thin film electrode pattern are contacted with the anti-etching metal layer, and thus, an undercut defect occurring between the surface of the ceramic substrate and the thin film electrode pattern and between the thin film electrode patterns due to an etchant can be prevented and the binding strength of the entire thin film electrode pattern can be enhanced, resulting in securing durability and reliability of the thin film electrode patterns.
    Type: Application
    Filed: July 13, 2012
    Publication date: February 7, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Won Hee Yoo, Byeung Gyu Chang, Taek Jung Lee, Yun Hwi Park
  • Publication number: 20120048602
    Abstract: There is provided a method of manufacturing a ceramic substrate for a probe card and a ceramic substrate for a probe card. The method includes preparing a ceramic substrate having a via electrode provided therein; filling a void formed between the ceramic substrate and the via electrode with a filling material including thermosetting resin; and curing the filling material. Since the void formed between the ceramic substrate and the via electrode is removed, fixation strength between the via electrode and a probe tip can be increased and a defect such as a hollow at the periphery of the via electrode can be prevented.
    Type: Application
    Filed: March 18, 2011
    Publication date: March 1, 2012
    Inventors: Taek Jung LEE, Byeung Gyu CHANG, Yun Hwi PARK
  • Patent number: 8106306
    Abstract: Provided is a method of manufacturing a ceramic multi-layer circuit substrate. A plurality of ceramic blocks, in each of which one or more ceramic green sheets having via-electrodes are layered one atop the other, are formed and are then fired. The fired ceramic blocks are aligned with each other. One or more bonding green sheets each having bonding electrodes in positions corresponding to the via-electrodes of the ceramic blocks are prepared. Each of the bonding green sheets is interposed between a pair of the ceramic blocks opposing each other. The ceramic blocks and the bonding green sheets are bonded and are then fired.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: January 31, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Won Hee Yoo, Byeung Gyu Chang, Taek Jung Lee, Yong Suk Kim
  • Patent number: 8012778
    Abstract: The invention provides an LED package capable of effectively releasing heat emitted from an LED chip out of the package and a fabrication method thereof. For this purpose, at least one groove is formed on an underside surface of the substrate to package the LED chip and the groove is filled with carbon nanotube material. In the LED package, a substrate having at least one groove on the underside surface is prepared. A plurality of electrodes are formed on a top surface of the substrate. Also, at least the one LED chip is mounted over the substrate to have both terminals electrically connected to the upper electrodes. In addition, carbon nanotube filler is filled in the groove of the substrate.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: September 6, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Yong Suk Kim, Young Soo Oh, Hyoung Ho Kim, Taek Jung Lee, Seog Moon Choi
  • Patent number: 7819995
    Abstract: There is provided a method of manufacturing a multilayer ceramic substrate, the method including: providing a non-sintered multilayer ceramic substrate having a plurality of low temperature sintering green sheets laminated therein; disposing a hard-to-sinter constraining green sheet on at least one of top and bottom surfaces of the non-sintered multilayer ceramic substrate; sintering the non-sintered multilayer ceramic substrate having the hard-to-sinter constraining layer disposed thereon; immersing the sintered multilayer ceramic substrate into an acidic solution; and activating a contact between the hard-to-sinter constraining layer and the acidic solution such that the hard-to-sinter constraining layer is removed.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: October 26, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yong Suk Kim, Byeung Gyu Chang, Taek Jung Lee
  • Publication number: 20100059266
    Abstract: Provided is a method of manufacturing a ceramic multi-layer circuit substrate. A plurality of ceramic blocks, in each of which one or more ceramic green sheets having via-electrodes are layered one atop the other, are formed and are then fired. The fired ceramic blocks are aligned with each other. One or more bonding green sheets each having bonding electrodes in positions corresponding to the via-electrodes of the ceramic blocks are prepared. Each of the bonding green sheets is interposed between a pair of the ceramic blocks opposing each other. The ceramic blocks and the bonding green sheets are bonded and are then fired.
    Type: Application
    Filed: March 17, 2009
    Publication date: March 11, 2010
    Inventors: Won Hee YOO, Byeung Gyu CHANG, Taek Jung LEE, Yong Suk KIM
  • Publication number: 20100051173
    Abstract: There is provided a method of manufacturing a multilayer ceramic substrate, the method including: providing a non-sintered multilayer ceramic substrate having a plurality of low temperature sintering green sheets laminated therein; disposing a hard-to-sinter constraining green sheet on at least one of top and bottom surfaces of the non-sintered multilayer ceramic substrate; sintering the non-sintered multilayer ceramic substrate having the hard-to-sinter constraining layer disposed thereon; immersing the sintered multilayer ceramic substrate into an acidic solution; and activating a contact between the hard-to-sinter constraining layer and the acidic solution such that the hard-to-sinter constraining layer is removed.
    Type: Application
    Filed: March 25, 2009
    Publication date: March 4, 2010
    Inventors: Yong Suk KIM, Byeung Gyu CHANG, Taek Jung LEE
  • Publication number: 20100051172
    Abstract: A method for manufacturing a ceramic green sheet includes providing a stamp having an imprinting surface on which a raised structure corresponding to a circuit pattern is formed, imprinting the stamp on the ceramic green sheet to form a depressed pattern in the ceramic green sheet, the depressed pattern being transferred from the raised structure, curing the ceramic green sheet with the stamp imprinted on the ceramic green sheet, separating the stamp from the ceramic green sheet, and providing the depressed pattern of the ceramic green sheet with the conductive material.
    Type: Application
    Filed: March 24, 2009
    Publication date: March 4, 2010
    Inventors: Yong Suk Kim, Yong Soo Oh, Byeung Gyu Chang, Yong Seok Choi, Hwan Soo Lee, Sang Moon Lee, Taek Jung Lee
  • Publication number: 20090061550
    Abstract: The invention provides an LED package capable of effectively releasing heat emitted from an LED chip out of the package and a fabrication method thereof. For this purpose, at least one groove is formed on an underside surface of the substrate to package the LED chip and the groove is filled with carbon nanotube material. In the LED package, a substrate having at least one groove on the underside surface is prepared. A plurality of electrodes are formed on a top surface of the substrate. Also, at least the one LED chip is mounted over the substrate to have both terminals electrically connected to the upper electrodes. In addition, carbon nanotube filler is filled in the groove of the substrate.
    Type: Application
    Filed: October 28, 2008
    Publication date: March 5, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yong Suk KIM, Young Soo OH, Hyoung Ho KIM, Taek Jung LEE, Seog Moon CHOI