Abstract: The present invention relates to a mask-support assembly and a producing method thereof. The mask-support assembly according to the present invention may include: a support comprising an edge portion and a grid portion; and a mask connected onto the support and comprising a plurality of cell portions in each of which a mask pattern is formed, wherein at least a partial region of the support is exposed on one surface of the support except for a region where the cell portions of the mask are disposed.

Abstract: A mask-support assembly and a producing method thereof are provided. The mask-support assembly, which is used in a process of forming organic light-emitting diode (OLED) pixels on a semiconductor wafer, includes: a support comprising an edge portion and a grid portion; and a mask connected onto the support and comprising a plurality of cell portions in each of which a mask pattern is formed.

Abstract: Proposed are a mask-integrated frame and a method of manufacturing the same. The mask-integrated frame used to deposit organic light-emitting diode (OLED) pixels on a semiconductor wafer includes a frame including an opening, a grid sheet connected onto the frame, having a circular edge, and including grids provided on at least the opening of the frame, and a mask connected onto the grid sheet, having a circular shape, and including mask patterns.

Abstract: The present invention relates to a frame-integrated mask. The frame-integrated mask according to the present invention is used in a process of forming pixels on a silicon wafer, and includes a mask including a mask pattern, and a frame connected to at least a part of a region of the mask excluding the region in which the mask pattern is formed. The mask has a shape corresponding to the silicon wafer and is integrally connected to the frame.

Abstract: The present invention relates to a frame-integrated mask. The frame-integrated mask (10) according to the present invention is used in a process of forming pixels on a silicon wafer, and comprises: a mask (20) including a mask pattern (PP); and a frame (30) connected to at least a part of a region (20b) of the mask excluding the region (20a) in which the mask pattern (PP) is formed, wherein the mask (20) has a shape corresponding to the silicon wafer and is integrally connected to the frame (30).

Abstract: Provided are a mother plate, a method of manufacturing the mother plate, a method of manufacturing a mask, and a method of depositing organic light-emitting diode (OLED) pixels. A method of manufacturing a mother plate 20 used to electroform a mask, according to the present invention, includes (a) providing a substrate 21 made of conductive monocrystalline silicon, and (b) forming an insulator 25 having patterns, on at least one surface of the substrate 21.

Abstract: A solar cell mode and a method for manufacturing the same are disclosed. The solar battery module in accordance with the present invention includes a plurality of solar cells arranged in row and column directions; and a conductive ribbon electrically connecting the plurality of solar cells, wherein each of the solar cells has a structure in which a first photoelectric element including a polycrystalline semiconductor layer and a second photoelectric element including an amorphous semiconductor layer are stacked.

Abstract: A semiconductor manufacturing apparatus includes: a reaction chamber for providing an airtight process space; a boat for loading/unloading a pair of semiconductor substrates into/from the reaction chamber, wherein the boat includes susceptors and rotary tables to be rotatably supported by a plurality of supporting rollers, each semiconductor substrate being mounted onto each susceptor and each susceptor being mounted onto each rotary table, respectively; heaters, arranged at backsides of the semiconductor substrates, for performing an epitaxial process in the reaction chamber; a process gas nozzle, installed to encircle an upper fringe of the semiconductor substrates; an exhaust gas nozzle, installed to encircle a lower fringe of the semiconductor substrates; and a purge gas nozzle for supplying a purge gas capable of preventing an outer wall of the process gas nozzle from being deposited, wherein the purge gas nozzle is arranged near to the process gas nozzle.

Abstract: A fabricating method of a polysilicon layer is disclosed which can be applied for fabricating a semiconductor device such as a SRAM and so on. The method for fabricating the semiconductor device includes the steps of: forming a transistor included in the semiconductor device on a semi conductor substrate forming an insulating layer on the transistor; forming contact holes, through which a region of the transistor is exposed, by selectively removing the insulating layer forming a silicon layer in the contact holes forming a metal layer on the insulating layer and the silicon layer; forming a metal suicide layer through heat treatment of the silicon layer and the metal layer; removing the metal layer; forming an amorphous silicon layer on the insulating layer and the metal suicide layer; and forming a polysilicon layer through heat treatment of the amorphous silicon layer.

Abstract: A manufacturing method of a polycrystalline solar cell is disclosed. A polycrystalline silicon solar cell in accordance with the present invention performs crystallization-annealing amorphous silicon with a metal catalyst so as to reduce a crystallization temperature. The manufacturing method of a solar cell in accordance with the present invention includes the steps of (a) forming a first amorphous silicon layer on a substrate; (b) forming a second amorphous silicon layer on the first amorphous silicon layer; (c) forming a metal layer on the second amorphous silicon layer; (d) performing crystallization-annealing the second amorphous silicon layer; and (e) forming a third amorphous silicon layer on a resulting crystalline silicon layer of the step (d).

Abstract: A manufacturing method of a polycrystalline solar cell is disclosed. A polycrystalline silicon solar cell in accordance with the present invention performs crystallization-annealing amorphous silicon with a metal catalyst so as to reduce a crystallization temperature. The manufacturing method of a solar cell in accordance with the present invention includes the steps of (a) forming a first amorphous silicon layer on a substrate; (b) forming a second amorphous silicon layer on the first amorphous silicon layer; (c) forming a metal layer on the second amorphous silicon layer; (d) performing crystallization-annealing the second amorphous silicon layer; and (e) forming a third amorphous silicon layer on a resulting crystalline silicon layer of the step (d).

Abstract: A polycrystalline silicon solar cell and its manufacturing method are disclosed. The polycrystalline silicon solar cell in according with the present invention is formed by crystallizing amorphous silicon, in which a metal catalyst is used to lower crystallization temperature. The solar cell in according with the present invention is characterized by comprising a plurality of polycrystalline silicon layers, wherein at least one of the plurality of polycrystalline silicon layers contains a metal component.

Abstract: A fabricating method of a polysilicon layer is disclosed which can be applied for fabricating a semiconductor device such as a SRAM and so on.

Abstract: A heating system of a batch type reaction chamber for semiconductor device and a method thereof are disclosed. Each heat unit of heating groups has different height and caloric value at right angles according to the divided areas, thereby it can control an uniform temperature incline of the entire process space of the reaction chamber. Also, the reflecting plates are formed by each heating unit, so that the change of the heating unit can be simple. Furthermore, the divided reflecting blocks are adjacently connected to another reflecting block through the radiant wave shielding slit between them, so that the leakage of the radiant wave can be prevented and the reflecting blocks can be separately attached and deattached to each other. Also, the turning member is formed at the lower portion of the reflecting blocks, so that it can be easily attached and deattached.

Abstract: Apparatus and method for forming a polycrystalline silicon thin film by converting an amorphous silicon thin film into the polycrystalline silicon thin film using a metal are provided. The method includes: a metal nucleus adsorbing step of introducing a vapor phase metal compound into a process space where the glass substrate having the amorphous silicon formed thereon is disposed, to adsorb a metal nucleus contained in the metal compound into the amorphous silicon layer; a metal nucleus distribution region-forming step of forming a community region including a plurality of silicon particles every metal nucleus in a plane boundary region occupied by the metal compound by a self-limited mechanism due to the adsorption of the metal nucleus; and an excess gas removing step of purging and removing an excess gas which is not adsorbed in the metal nucleus distribution region-forming step.

Abstract: A semiconductor manufacturing device and a method thereof capable of processing semiconductor substrates having a large diameter in a state that the semiconductor substrates keep standing and are opposed to each other are disclosed. The semiconductor manufacturing device includes a reaction chamber for providing an airtight process space; a boat including a pair of susceptors as the processing device mounted to the reaction chamber; a driving device for rotating the susceptors; a heater; a loading device for inserting the heater into an inner space of the susceptors; a supply nozzle and an exhaust nozzle; and a lifting device for inserting the exhaust nozzle into the space between the holders. The semiconductor manufacturing device according to present invention can prevent the transformation of the semiconductor substrate and the contamination owing to the minute dust and maintain the uniform temperature gradient of the semiconductor substrate.

Abstract: A heating system of a batch type reaction chamber for semiconductor device and a method thereof are disclosed. Each heat unit of heating groups has different height and caloric value at right angles according to the divided areas, thereby it can control an uniform temperature incline of the entire process space of the reaction chamber. Also, the reflecting plates are formed by each heating unit, so that the change of the heating unit can be simple. Furthermore, the divided reflecting blocks are adjacently connected to another reflecting block through the radiant wave shielding slit between them, so that the leakage of the radiant wave can be prevented and the reflecting blocks can be separately attached and deattached to each other. Also, the turning member is formed at the lower portion of the reflecting blocks, so that it can be easily attached and deattached.

Abstract: A system for manufacturing a flat panel display includes a substrate storage part for storing a plurality of substrates; a first chamber including a substrate loading part for loading the plurality of substrates; a substrate transfer part, disposed between the substrate storage part and the first chamber, including an end effector for transferring the plurality of substrates between the substrate storage part and the substrate loading part; a second chamber including a source gas supplying part for uniformly supplying source gas to the entire surface of the plurality of substrates and a substrate heating part for heating the plurality of substrates; and a source powder supplying part including a source powder evaporating part for evaporating source powder in order to supply the source gas to the source gas supplying part and a source powder storage part for supplying the source powder to the source powder evaporating part.

Abstract: A method for forming a field oxide layer of a highly integrated semiconductor device comprises the steps of depositing a pad oxide layer and a nitride layer over a substrate, removing the nitride layer over a field region, forming spacers on the side walls of the remaining nitride layer, doping an impurity into the field region using the spacers as a mask, thermally oxidizing the substrate exposed in the field region, growing the field oxide layer, and planarizing the upper portion of the field oxide layer by an etchback process, thereby reducing the step coverage problem of the field oxide layer.Therefore, the size of bird's beak and stress can be reduced at the edges of the field region. The heavily doped channel stop layer is formed only in the middle section of the field region, thereby preventing the lowering of the breakdown voltage and punch-through.

Abstract: A method of fabricating a multi-chamber type DRAM cell capacitor having high capacitance within a limited area. A first concave area (54) of the storage electrode (72) is formed by means of an oxide film (46) as a scarifying layer. An insulating spacer (58) is formed in the first concave area (54). Then, first and second conduction layers (48, 60) are formed on the substrate (26) and top portions of the conduction layers are removed consecutively, so as to form a capacitor having a plurality of concave areas.