Abstract: A semiconductor manufacturing device and a method thereof capable of processing semiconductor substrates having a large diameter in a state that the semiconductor substrates keep standing and are opposed to each other are disclosed. The semiconductor manufacturing device includes a reaction chamber for providing an airtight process space; a boat including a pair of susceptors as the processing device mounted to the reaction chamber; a driving device for rotating the susceptors; a heater; a loading device for inserting the heater into an inner space of the susceptors; a supply nozzle and an exhaust nozzle; and a lifting device for inserting the exhaust nozzle into the space between the holders. The semiconductor manufacturing device according to present invention can prevent the transformation of the semiconductor substrate and the contamination owing to the minute dust and maintain the uniform temperature gradient of the semiconductor substrate.

Abstract: A heating system of a batch type reaction chamber for semiconductor device and a method thereof are disclosed. Each heat unit of heating groups has different height and caloric value at right angles according to the divided areas, thereby it can control an uniform temperature incline of the entire process space of the reaction chamber. Also, the reflecting plates are formed by each heating unit, so that the change of the heating unit can be simple. Furthermore, the divided reflecting blocks are adjacently connected to another reflecting block through the radiant wave shielding slit between them, so that the leakage of the radiant wave can be prevented and the reflecting blocks can be separately attached and deattached to each other. Also, the turning member is formed at the lower portion of the reflecting blocks, so that it can be easily attached and deattached.

Abstract: A system for manufacturing a flat panel display includes a substrate storage part for storing a plurality of substrates; a first chamber including a substrate loading part for loading the plurality of substrates; a substrate transfer part, disposed between the substrate storage part and the first chamber, including an end effector for transferring the plurality of substrates between the substrate storage part and the substrate loading part; a second chamber including a source gas supplying part for uniformly supplying source gas to the entire surface of the plurality of substrates and a substrate heating part for heating the plurality of substrates; and a source powder supplying part including a source powder evaporating part for evaporating source powder in order to supply the source gas to the source gas supplying part and a source powder storage part for supplying the source powder to the source powder evaporating part.

Abstract: A method for forming a field oxide layer of a highly integrated semiconductor device comprises the steps of depositing a pad oxide layer and a nitride layer over a substrate, removing the nitride layer over a field region, forming spacers on the side walls of the remaining nitride layer, doping an impurity into the field region using the spacers as a mask, thermally oxidizing the substrate exposed in the field region, growing the field oxide layer, and planarizing the upper portion of the field oxide layer by an etchback process, thereby reducing the step coverage problem of the field oxide layer.Therefore, the size of bird's beak and stress can be reduced at the edges of the field region. The heavily doped channel stop layer is formed only in the middle section of the field region, thereby preventing the lowering of the breakdown voltage and punch-through.

Abstract: A method of fabricating a multi-chamber type DRAM cell capacitor having high capacitance within a limited area. A first concave area (54) of the storage electrode (72) is formed by means of an oxide film (46) as a scarifying layer. An insulating spacer (58) is formed in the first concave area (54). Then, first and second conduction layers (48, 60) are formed on the substrate (26) and top portions of the conduction layers are removed consecutively, so as to form a capacitor having a plurality of concave areas.

Abstract: A semiconductor memory device and fabricating method thereof including one transistor consisting of a source, a drain and a gate electrode, a bit line in contact with the drain region of the transistor via a first contact hole, a storage electrode in contact with the source region of the transistor via a second contact hole, a first planarized insulating layer formed under the bit line and a second planarized insulating layer formed under the storage electrode, whereby the material layer formed under the conductive layers, e.g., the bit line and storage electrode, is planarized to prevent stringers created due to surface indentations. Further, after a spacer is formed directly on the side walls of contact hole or on the side walls of a pattern for forming the contact hole, the contact hole is formed to prevent the contact between conductive layers, as a result, improving the memory device's reliability and being advantageous in realizing high density.

Abstract: According to the present invention, the incomplete silicon exposure is prevented by the sufficient overetching after the formation of an etching-stop layer on an oxide layer for protecting a conductive layer from the damage of the protective oxide layer when the self-aligned contact window is formed. Therefore, the thickness of the protective oxide layer can be minimized, and the bend of the chip can be improved whereby the following process will be accomplished easily.

Abstract: A method of manufacturing folded capacitors comprises the steps of: forming a first storage electrode and a first insulating layer; forming a first plate electrode and a second insulating layer thereon and forming a pad poly thereon; limiting the first plate electrode to a predetermined portion; leaving a spacer; forming a second storage electrode; and depositing a third insulating layer and a second plate electrode thereon. It is possible to manufacture a capacitor with a large capacitance and to simplify the manufacturing processes of the capacitor by using the conventional capacitor manufacturing processes. The folded capacitors with a larger capacitance per unit area can be obtained without making the insulating layer be thinned even if the plane area of the capacitor may be reduced remarkably according to a tendency to high integration density.