Patents by Inventor Tae-Kyun Kim
Tae-Kyun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11958874Abstract: According to the embodiment of the present disclosure, an organo tin compound is represented by the following Chemical Formula 1: In Chemical Formula 1, L1 and L2 are each independently selected from an alkoxy group having 1 to 10 carbon atoms and an alkylamino group having 1 to 10 carbon atoms, R1 is a substituted or unsubstituted aryl group having 6 to 8 carbon atoms, and R2 is selected from a substituted or unsubstituted linear alkyl group having 1 to 4 carbon atoms, a branched alkyl group having 3 to 4 carbon atoms, a cycloalkyl group having 3 to 6 carbon atoms, and an allyl group having 2 to 4 carbon atoms.Type: GrantFiled: April 11, 2022Date of Patent: April 16, 2024Assignees: EGTM Co., Ltd., SK hynix Inc.Inventors: Jang Keun Sim, Sung Jun Ji, Tae Young Lee, Shin Beom Kim, Sun Young Baik, Tae Hwan Lim, Dong Kyun Lee, Sang Hyun Lee, Su Pill Chun
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Publication number: 20240121948Abstract: A semiconductor device and a method of fabricating the same are provided. According to the present invention, a semiconductor device comprises an active region formed in a substrate, and including flat surfaces and hole-shaped recess portions; upper-level plugs disposed over the flat surfaces; a spacer disposed between the upper-level plugs and providing a trench exposing the hole-shaped recess portions; a lower-level plug filling the hole-shaped recess portions; and a buried conductive line disposed over the lower-level plug and partially filling the trench.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Jae Man YOON, Jin Hwan JEON, Tae Kyun KIM, Jung Woo PARK, Su Ock CHUNG, Jae Won HA
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Publication number: 20240093401Abstract: A method of manufacturing a multilayer metal plate by electroplating includes a first forming operation of forming one of a first metal layer and a second metal layer on a substrate by electroplating, wherein the second metal layer is less recrystallized than the first metal layer, the second metal layer is comprised of nanometer-size grains, and the second metal layer has a higher level of tensile strength than the first metal layer; and a second forming operation of forming, by electroplating, a third metal layer not formed in the first forming operation on a surface of one of the first metal layer and the second metal layer formed in the first forming operation.Type: ApplicationFiled: September 18, 2023Publication date: March 21, 2024Applicant: DONG-A UNIVERSITY RESEARCH FOUNDATION FOR INDUSTRY-ACADEMY COOPERATIONInventors: Hyun PARK, Sung Jin KIM, Han Kyun SHIN, Hyo Jong LEE, Jong Bae JEON, Jung Han KIM, An Na LEE, Tae Hyun KIM, Hyung Won CHO
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Publication number: 20240079355Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.Type: ApplicationFiled: November 1, 2023Publication date: March 7, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Jin-su LEE, Hong Sik CHAE, Youn Soo KIM, Tae Kyun KIM, Youn Joung CHO
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Publication number: 20240079456Abstract: A method of manufacturing a semiconductor device includes: forming a trench in an insulating interlayer by etching the insulating interlayer; forming a conductive layer on bottom, side, and upper surfaces of the insulating interlayer where the trench is formed, using a first deposition process, the conductive layer on the bottom surface of the trench being thicker than the conductive layer on the side surface of the trench; forming a sacrificial layer in the trench covering the conductive layer formed on the bottom surface of the trench using a second deposition process different from the first deposition process; selectively removing the conductive layer formed on the upper surface of the insulating interlayer and formed on the side surface of the trench left exposed through the sacrificial layer; and selectively removing the sacrificial layer, to form a conductive line using the conductive layer remaining on the bottom surface of the trench.Type: ApplicationFiled: January 10, 2023Publication date: March 7, 2024Applicant: SK hynix Inc.Inventors: Jae Man YOON, Jun Ki KIM, Tae Kyun KIM, Jung Woo PARK, Jae Won HA
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Patent number: 11923035Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.Type: GrantFiled: February 10, 2022Date of Patent: March 5, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Chan Ho Lee, Tae Min Choi, Jeong Kyun Kim, Hyeong Cheol Kim, Suk Youn, Ju Chang Lee, Kyu Won Choi
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Patent number: 11920034Abstract: Described herein is a polyamide composition (P) including specific flat glass fibres (B) with elongated shape having a non-circular cross-sectional area. The polyamide composition (P) is advantageously used for the production of molded parts. Also described herein is a method of using molded parts obtainable by molding of the polyamide composition (P) to produce mechanical parts. The molded parts are characterized by having improved fatigue resistance properties. Also described herein is a polyamide composition (P) including PA 6.6 as polyamide (A) and flat glass fibres (B).Type: GrantFiled: October 22, 2019Date of Patent: March 5, 2024Assignee: BASF SEInventors: Gilles Robert, Tae-Kyun Kim, Weibing Wang, Franco Speroni
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Publication number: 20240074165Abstract: A semiconductor device comprises a substrate including first and second regions; a plurality of conductive line structures disposed over the substrate; a plurality of conductive contact plugs formed between the conductive line structures disposed over the first region of the substrate; and a plurality of dummy dielectric plugs disposed over the second region of the substrate.Type: ApplicationFiled: April 3, 2023Publication date: February 29, 2024Inventors: Dae Won KIM, Yu Ri KIM, Tae Kyun KIM, Jin Hwan JEON, Dong Goo CHOI, Ri CHOI
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Patent number: 11895828Abstract: A semiconductor device and a method of fabricating the same are provided. According to the present invention, a semiconductor device comprises an active region formed in a substrate, and including flat surfaces and hole-shaped recess portions; upper-level plugs disposed over the flat surfaces; a spacer disposed between the upper-level plugs and providing a trench exposing the hole-shaped recess portions; a lower-level plug filling the hole-shaped recess portions; and a buried conductive line disposed over the lower-level plug and partially filling the trench.Type: GrantFiled: April 13, 2022Date of Patent: February 6, 2024Assignee: SK hynix Inc.Inventors: Jae Man Yoon, Jin Hwan Jeon, Tae Kyun Kim, Jung Woo Park, Su Ock Chung, Jae Won Ha
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Publication number: 20240014252Abstract: A semiconductor device includes a substrate, first and second supporter patterns spaced vertically from the substrate, the second supporter pattern being spaced vertically from the first supporter pattern, a lower electrode hole extending vertically on the substrate, a lower electrode inside the lower electrode hole, contacting a sidewall of the first and second supporter patterns, the lower electrode including a first layer along a portion of a sidewall and bottom surface of the lower electrode hole, a second layer between the first layers, and a third layer on an upper surface of the first and second layers, the first and second layers including a material different from the second layer, and a sidewall of at least a portion of the third layer being concave toward the third layer, overlapping the second layer in the vertical direction, and being spaced apart from the second layer in the vertical direction.Type: ApplicationFiled: March 10, 2023Publication date: January 11, 2024Inventors: Hong Sik CHAE, Tae Kyun KIM, Ji Hoon AN, Hyun-Suk LEE, Gi Hee CHO, Jae Hyoung CHOI
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Publication number: 20240001462Abstract: A cutting insert according to an embodiment of the present invention is a double-sided cutting insert comprising an upper surface, a lower surface, a side surface, a cutting edge, and a mounting hole penetrating the upper surface and the lower surface, in which the upper surface is provided with a single upper surface boss portion that surrounds the mounting hole and is flat, the cutting edge includes a main cutting edge, a corner cutting edge extending from the main cutting edge, a sub-cutting edge extending from the corner cutting edge, and a side portion extending from the sub-cutting edge, a first main cutting edge flank surface extending from the main cutting edge forms an acute angle with an extension line of the upper surface boss portion, a sub-cutting edge chip breaker surface extending from the sub-cutting edge is at a gradually increasing angle with the extension line of the upper surface boss portion, as the sub-cutting edge chip breaker surface is distanced away from the corner cutting edge, andType: ApplicationFiled: August 26, 2021Publication date: January 4, 2024Applicant: KORLOY INC.Inventors: Nam Seon LEE, Ki Chan NAM, Tae Kyun KIM, Young Heum KIM
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Patent number: 11848287Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.Type: GrantFiled: September 9, 2021Date of Patent: December 19, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-su Lee, Hong Sik Chae, Youn Soo Kim, Tae Kyun Kim, Youn Joung Cho
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Publication number: 20230355959Abstract: A sheet mask device includes a base sheet having a shape to cover the skin; an electrode unit formed on the base sheet to allow a current for iontophoresis to flow; and a power supply unit formed on the base sheet and connected to the electrode unit to supply electric energy. The power supply unit includes a battery activated by the liquid composition supplied to the base sheet; and a display unit configured to visually display whether or not the battery is activated.Type: ApplicationFiled: November 12, 2020Publication date: November 9, 2023Inventors: Tae Kyun KIM, Seung Woo SHIN
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Publication number: 20230292495Abstract: An embodiment of the present invention provides a semiconductor device capable of improving gate induced drain leakage and a method for fabricating the same, According to an embodiment of the present invention, a semiconductor device comprises a substrate including a trench; a gate insulating layer covering a bottom surface and a sidewall of the trench; and a gate electrode structure and a capping layer sequentially stacked on the gate insulating layer and filling the trench, wherein the gate electrode structure includes: a first gate electrode including a metal nitride; a second gate electrode formed over the first gate electrode, having the same metal nitride as the first gate electrode, and having a lower work function than that of the first gate electrode; and a third gate electrode formed over the second gate electrode, having a thickness smaller than that of the second gate electrode, and including a non-metal material.Type: ApplicationFiled: September 19, 2022Publication date: September 14, 2023Inventors: Dong Soo KIM, Tae Kyun Kim
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Publication number: 20230168111Abstract: A multi-measurement apparatus using a search-coil type sensor includes: sensor modules, each of which has one or more sensors including respective housings having respective inner spaces, respective cores formed to be inserted into the inner spaces of the housings, and respective coils which are each wound around a portion of an outer circumferential surface of each of the housings, the portion corresponding to a position of each of the cores; impedance matching units that are connected to a plurality of the sensors, respectively, and perform impedance matching; and amplifiers that are connected to the impedance matching units, respectively, and amplify a fine current and voltage generated during approach of objects to the sensors.Type: ApplicationFiled: April 5, 2021Publication date: June 1, 2023Inventors: Jae Hun CHOI, Tae Kyun KIM
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Publication number: 20230161066Abstract: A metal detecting system using search-coil type sensor includes sensor modules that detect respective objects which move around the corresponding sensor modules, each sensor module having one or more sensors that include respective housings having respective inner spaces, respective cores formed to be inserted into the inner spaces of the housings, and respective coils which are each wound around a portion of an outer circumferential surface of each of the housings, the portion corresponding to a position of each of the cores; imaging units that image the respective objects that move around the corresponding sensor modules and image respective persons possessing the respective objects; impedance matching units that are connected to a plurality of the sensor modules, respectively, and perform impedance matching; and amplifiers that are connected to the impedance matching units, respectively, and amplify a fine current and voltage generated during approach of the objects to the sensor modules.Type: ApplicationFiled: April 5, 2021Publication date: May 25, 2023Inventors: Jae Hun CHOI, Tae Kyun KIM
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Patent number: 11655235Abstract: The present technology provides pyrrolidine and piperidine compounds or pharmaceutically acceptable salts thereof, preparation processes thereof, pharmaceutical compositions comprising the same, and uses thereof. In particular, said compounds may be usefully applied in the treatment and prevention of FAP-mediated diseases.Type: GrantFiled: November 5, 2020Date of Patent: May 23, 2023Assignee: YUHAN CORPORATIONInventors: Tae Han Dong, Yoo Hoi Park, Tae Kyun Kim, Jae Eun Joo, Eun Hye Jung, Jae Won Jeong, Hyun Seung Lee, Do Hoon Kim, Ji Eun Yang, Jun Chui Park, Sang Myoun Lim, Na Ry Ha, Da In Chung, Ji Yeong Gal
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Publication number: 20230104078Abstract: An apparatus for correcting non-polarity and measuring displacement of an object using a search-coil type sensor includes a plurality of sensors that include respective housings having respective inner spaces, respective cores formed to be inserted into the inner spaces of the housings, and respective coils which are each wound around a portion of an outer circumferential surface of each of the housings, the portion corresponding to a position of each of the cores. The plurality of sensors are arranged in parallel with each other. A position of a core and a coil with respect to one housing differs from a position of a core and a coil with respect to another housing. An induced magnetic field is formed due to a distance change with respect to the object containing iron (Fe).Type: ApplicationFiled: April 5, 2021Publication date: April 6, 2023Inventors: Jae Hun CHOI, Tae Kyun KIM
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Publication number: 20230102043Abstract: A semiconductor device and a method of fabricating the same are provided. According to the present invention, a semiconductor device comprises an active region formed in a substrate, and including flat surfaces and hole-shaped recess portions; upper-level plugs disposed over the flat surfaces; a spacer disposed between the upper-level plugs and providing a trench exposing the hole-shaped recess portions; a lower-level plug filling the hole-shaped recess portions; and a buried conductive line disposed over the lower-level plug and partially filling the trench.Type: ApplicationFiled: April 13, 2022Publication date: March 30, 2023Inventors: Jae Man YOON, Jin Hwan JEON, Tae Kyun KIM, Jung Woo PARK, Su Ock CHUNG, Jae Won HA
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Publication number: 20230086884Abstract: Provided are aminopyridine compounds and pharmaceutically acceptable compositions thereof which exhibit inhibition activity against certain mutated forms of EGFR.Type: ApplicationFiled: August 26, 2022Publication date: March 23, 2023Applicants: YUHAN CORPORATION, JANSSEN BIOTECH, INC.Inventors: Byoungmoon LEE, Hyunjoo LEE, Gyu Jin LEE, Su Bin CHOI, Sol PARK, Heejun KIM, Misong KIM, Young Ae YOON, Kwan Hoon HYUN, Tae Kyun KIM, Jae Young SIM, Marian C. BRYAN, Scott KUDUK, James Campbell ROBERTSON