Patents by Inventor Tai-An Lin

Tai-An Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11765071
    Abstract: A method for facilitating a flow from a sending end to a receiving end by multi-path transmission is introduced. The method is applied to a network controller of a software-defined network. The software-defined network includes a plurality of switches. The switches execute packet forwarding from the sending end to the receiving end. The method includes: executing, by the network controller, operations, so as for a flow from the sending end to reach the receiving end by multi-path transmission using a plurality of network paths, so as to enable the multi-path transmission to be transparent to the sending end and the receiving end. The network controller is, according to the method, configured to facilitate a transmission mechanism for multi-path stochastic switching or a transmission mechanism for multi-path stochastic switching with network coding, so as to enable multi-path transmission of the packets in one single flow and thus enhance transmission performance.
    Type: Grant
    Filed: December 13, 2020
    Date of Patent: September 19, 2023
    Assignee: NATIONAL TAIPEI UNIVERSITY OF EDUCATION
    Inventors: Yeong-Sheng Chen, Chih-Heng Ke, Tai-Lin Chin
  • Patent number: 11749570
    Abstract: In a method of patterning an integrated circuit, test layer thickness variation data is received when a test layer with a known thickness disposed over a test substrate undergoes tilted angle plasma etching. Overlay offset data per substrate locations caused by the tilted angle plasma etching is determined. The overlay offset data is determined based on the received thickness variation data. The overlay offset data is associated with an overlay between first circuit patterns of a first layer on the semiconductor substrate and corresponding second circuit patterns of a second layer disposed over the first layer on the substrate. A location of the substrate is adjusted based on the overlay offset data during a lithography operation to pattern a resist layer over the second layer. The second layer is patterned based on the projected layout patterns of the reticle and using the tilted angle plasma etching.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-De Ho, Pei-Sheng Tang, Han-Wei Wu, Yuan-Hsiang Lung, Hua-Tai Lin, Chen-Jung Wang
  • Patent number: 11748549
    Abstract: Various integrated circuit (IC) design methods are disclosed herein. An exemplary method includes receiving an IC design layout having an IC feature to be formed on a wafer using a lithography process and inserting a spacing in the IC feature, thereby generating a modified IC design layout that divides the IC feature into a first main feature and a second main feature separated by the spacing. The spacing has a sub-resolution dimension, such that the IC feature does not include the spacing when formed on the wafer by the lithography process using the modified IC design layout. A mask can be fabricated based on the modified IC design layout, wherein the mask includes the first main feature and the second main feature separated by the spacing. A lithography process can be performed using the mask to form the IC feature (without the spacing) on a wafer.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Min Huang, Bo-Han Chen, Cherng-Shyan Tsay, Chien-Wen Lai, Hua-Tai Lin, Chia-Cheng Chang, Lun-Wen Yeh, Shun-Shing Yang
  • Publication number: 20230260843
    Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 17, 2023
    Inventors: Ryan Chia-Jen Chen, Yih-Ann Lin, Chia Tai Lin, Chao-Cheng Chen
  • Patent number: 11688610
    Abstract: A method for forming a semiconductor structure includes forming a pattern having first and second line features extending in a first direction on a substrate. After depositing a photoresist layer on the substrate to cover the pattern, the photoresist layer is patterned to form a cut pattern including first and second cut features exposing portions of the respective first and second line features. In a top view, at least one of the first and second cut features is asymmetrically arranged with respect to a central axis of a corresponding first or second line feature. At least one angled ion implantation is performed to enlarge the first and second cut features in at least one direction perpendicular to the first direction. The portions of the first and second line features exposed by the respective first and second cut features are then removed.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzung-Hua Lin, Yi-Ko Chen, Chia-Chu Liu, Hua-Tai Lin
  • Patent number: 11670552
    Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ryan Chia-Jen Chen, Yih-Ann Lin, Chia Tai Lin, Chao-Cheng Chen
  • Publication number: 20230154021
    Abstract: A method for registering a two-dimensional image data set with a three-dimensional image data set of a body of interest is discloses herein. The method includes the following steps: obtaining a first spatial parameter of a first registered virtual camera, wherein the first registered virtual camera is positioned corresponding to a first two-dimensional image of the two-dimensional image data set; and adjusting a second spatial parameter of the first unregistered virtual camera with the first spatial parameter of the first registered virtual camera, wherein the first unregistered virtual camera is failed to be positioned corresponding to the first two-dimensional image of the two-dimensional image data set.
    Type: Application
    Filed: July 1, 2022
    Publication date: May 18, 2023
    Applicant: Remex Medical Corp.
    Inventors: Sheng-Fang LIN, Ying-Yi CHENG, Chen-Tai LIN, Shan-Chien CHENG
  • Publication number: 20230149083
    Abstract: A method for registering a two-dimensional image data set of a body of interest with a three-dimensional image data set of the body of interest is discloses herein. The method includes the following steps: generating a first reconstructed image from the three-dimensional image data set with a first spatial parameter; calculating a reference similarity value according to the first reconstructed image and the two-dimensional image data set; generating a second reconstructed image from the three-dimensional image data set with a second spatial parameter; calculating a comparison similarity value according to the second reconstructed image and the two-dimensional image data set; comparing the comparison similarity value with the reference similarity value; and registering the two-dimensional image data set to the three-dimensional image data set if the comparison similarity value is not greater than the reference similarity value.
    Type: Application
    Filed: July 1, 2022
    Publication date: May 18, 2023
    Applicant: Remex Medical Corp.
    Inventors: Sheng-Fang LIN, Ying-Yi CHENG, Chen-Tai LIN, Shan-Chien CHENG
  • Publication number: 20230154019
    Abstract: A method for registering a two-dimensional image data set with a three-dimensional image data set of a body of interest is discloses herein. The method includes the following steps: adjusting a first virtual camera according to a distance parameter calculated corresponding to the two-dimensional image data set and the body of interest; rotating the first virtual camera according to an angle difference between a first vector and a second vector; and rotating the first virtual camera according to an angle which is corresponding to a maximum similarity value of a plurality of similarity values calculated in accordance with reconstructed images of the three-dimensional image data set which includes one generated by the first virtual camera and the others generated by other virtual cameras with different angles or different pixels from the one generated by the first virtual camera and the two-dimensional image data set.
    Type: Application
    Filed: July 1, 2022
    Publication date: May 18, 2023
    Applicant: Remex Medical Corp.
    Inventors: Sheng-Fang LIN, Ying-Yi CHENG, Chen-Tai LIN, Shan-Chien CHENG
  • Publication number: 20230154018
    Abstract: A method for registering a two-dimensional image data set with a three-dimensional image data set of a body of interest is discloses herein. The method includes the following steps: defining a first vector of a registered virtual camera in a coordinate system of the three-dimensional image data et; obtaining a first transformed vector of an unregistered virtual camera in the coordinate system of the three-dimensional image data set by transforming the first vector of the registered virtual camera through at least one transforming matrix; defining a focal point of the unregistered virtual camera at a reference point of the two-dimensional image data set in the coordinate system of the three-dimensional image data set; and repositioning the unregistered virtual camera according to the first transformed vector and the focal point of the unregistered virtual camera.
    Type: Application
    Filed: July 1, 2022
    Publication date: May 18, 2023
    Applicant: Remex Medical Corp.
    Inventors: Sheng-Fang LIN, Ying-Yi CHENG, Chen-Tai LIN, Shan-Chien CHENG
  • Publication number: 20230140255
    Abstract: Chalcogenide waveguides with high width-to-height aspect ratios and a smooth exposed surfaces can serve as mid-infrared evanescent-absorption-based sensors for detecting and identifying volatile organic compounds and/or determining their concentration, optionally in real-time. The waveguide sensors may be manufactured using a modified sputtering process in which the sputtering target and waveguide substrate are titled and/or laterally offset relative to each other and the substrate is continuously rotated.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 4, 2023
    Inventor: Pao Tai Lin
  • Publication number: 20230139799
    Abstract: In pattern formation method, a photomask is loaded into a lithography apparatus, an exposure light is applied to a photo resist layer formed over a substrate through or via the photomask, and the photo resist layer is developed. The photomask includes a plurality of octagonal shape patterns periodically arranged in a first direction and a second direction crossing the first direction. A width Lx of horizontal sides extending in the first direction of each of the plurality octagonal shape patterns is different from a width Ly of vertical sides extending in the second direction of each of the plurality octagonal shape patterns.
    Type: Application
    Filed: March 30, 2022
    Publication date: May 4, 2023
    Inventors: Wei-De HO, Han-Wei WU, Yuan-Hsiang LUNG, Hua-Tai LIN
  • Publication number: 20230115934
    Abstract: A surgical navigation method includes obtaining a three-dimensional image; selecting a viewing angle direction; generating one or more two-dimensional images arranged along the viewing angle direction from the three-dimensional image; superimposing the one or more two-dimensional images along the viewing angle direction to form a two-dimensional superimposed image; and guiding a movement of a virtual surgical instrument into the two-dimensional superimposed image.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 13, 2023
    Inventors: Chen-Tai LIN, Shan-Chien CHENG, Ying-Yi CHENG
  • Publication number: 20230062426
    Abstract: In a method of patterning an integrated circuit, test layer thickness variation data is received when a test layer with a known thickness disposed over a test substrate undergoes tilted angle plasma etching. Overlay offset data per substrate locations caused by the tilted angle plasma etching is determined. The overlay offset data is determined based on the received thickness variation data. The overlay offset data is associated with an overlay between first circuit patterns of a first layer on the semiconductor substrate and corresponding second circuit patterns of a second layer disposed over the first layer on the substrate. A location of the substrate is adjusted based on the overlay offset data during a lithography operation to pattern a resist layer over the second layer. The second layer is patterned based on the projected layout patterns of the reticle and using the tilted angle plasma etching.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Inventors: Wei-De HO, Pei-Sheng TANG, Han-Wei WU, Yuan-Hsiang LUNG, Hua-Tai LIN, Chen-Jung WANG
  • Publication number: 20230067049
    Abstract: A method for manufacturing a memory device includes forming a dielectric layer over a wafer, wherein the wafer has a device region and a peripheral region adjacent to the device region. A bottom via opening is formed in the dielectric layer and over the device region of the wafer and a trench is fanned in the dielectric layer and over the peripheral region of the wafer. A bottom electrode via is formed in the bottom via opening. A bottom electrode layer is conformally formed over the bottom electrode via and lining a sidewall and a bottom of the trench. A memory layer and a top electrode are formed over the bottom electrode layer.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pei-Sheng TANG, Wei-De HO, Han-Wei WU, Yuan-Hsiang LUNG, Hua-Tai LIN
  • Publication number: 20230049896
    Abstract: A method of manufacturing a semiconductor device includes forming an underlying structure in a first area and a second area over a substrate. A first layer is formed over the underlying structure. The first layer is removed from the second area while protecting the first layer in the first area. A second layer is formed over the first area and the second area, wherein the second layer has a smaller light transparency than the first layer. The second layer is removed from the first area, and first resist pattern is formed over the first layer in the first area and a second resist pattern over the second layer in the second area.
    Type: Application
    Filed: April 5, 2022
    Publication date: February 16, 2023
    Inventors: Jin-Dah CHEN, Han-Wei WU, Yuan-Hsiang LUNG, Hua-Tai LIN
  • Publication number: 20230034038
    Abstract: A surgical navigation method includes selecting one or more two-dimensional images from a three-dimensional image. The method further includes adjusting a portion of the two-dimensional images along a viewing direction. The method also includes superimposing the portion of the two-dimensional images along the viewing direction to form a two-dimensional superimposed image. The method further incudes guiding movement of a virtual surgical instrument into the two-dimensional superimposed image.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 2, 2023
    Applicant: Remex Medical Corp
    Inventors: Chen-Tai LIN, Shan-Chien Cheng, Ying-Yi Cheng
  • Patent number: 11561172
    Abstract: Chalcogenide waveguides with high width-to-height aspect ratios and a smooth exposed surfaces can serve as mid-infrared evanescent-absorption-based sensors for detecting and identifying volatile organic compounds and/or determining their concentration, optionally in real-time. The waveguide sensors may be manufactured using a modified sputtering process in which the sputtering target and waveguide substrate are titled and/or laterally offset relative to each other and the substrate is continuously rotated.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: January 24, 2023
    Assignee: The Texas A&M University System
    Inventor: Pao Tai Lin
  • Patent number: 11552545
    Abstract: A power converter with a negative current detection mechanism is provided. A negative current detecting circuit includes a first operational amplifier, a first transistor and a second transistor. A non-inverting input terminal of the first operational amplifier is connected to a second terminal of a sense resistor. An inverting input terminal of the first operational amplifier is connected to a first terminal of a first capacitor. Control terminals of the first and second transistors are connected to an output terminal of the first operational amplifier. A first terminal of the first transistor is connected to the second terminal of the sense resistor. A second terminal of the first transistor is grounded. A first terminal of the second transistor is connected to the inverting input terminal of the first operational amplifier and the first terminal of the first transistor. A second terminal of the second transistor is grounded.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: January 10, 2023
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Hsin-Tai Lin, Tzu-Yang Yen
  • Patent number: 11543753
    Abstract: In one example, an apparatus includes an extreme ultraviolet illumination source and an illuminator. The extreme ultraviolet illumination source is arranged to generate a beam of extreme ultraviolet illumination to pattern a resist layer on a substrate. The illuminator is arranged to direct the beam of extreme ultraviolet illumination onto a surface of a photomask. In one example, the illuminator includes a field facet mirror and a pupil facet mirror. The field facet mirror includes a first plurality of facets arranged to split the beam of extreme ultraviolet illumination into a plurality of light channels. The pupil facet mirror includes a second plurality of facets arranged to direct the plurality of light channels onto the surface of the photomask. The distribution of the second plurality of facets is denser at a periphery of the pupil facet mirror than at a center of the pupil facet mirror.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: January 3, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ken-Hsien Hsieh, Shih-Ming Chang, Wen Lo, Wei-Shuo Su, Hua-Tai Lin