Patents by Inventor Tai To Lee

Tai To Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240409395
    Abstract: A semiconductor device is provided. The semiconductor device includes a metal layer. The semiconductor includes a gyroscope including a getter structure overlying the metal layer, wherein the getter structure comprises titanium.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 12, 2024
    Inventors: Chih-Chung LEE, Be-Ge Huang, Fei-Lung Lai, Chuan-Tai Wu
  • Publication number: 20240412774
    Abstract: The present disclosure provides a memory device, including a memory array, a tracking circuit, a memory controller, and a word line driver. A plurality of word lines are in communication with a plurality of memory cells of the memory array. The memory controller decodes a memory address of a memory access command to generate a decoded row address signal. The word line driver is configured to assert one of the plurality of word lines in response to the decoded row address signal. In response to detecting a switching event of a clock control signal derived from an input clock signal of the memory device, the memory controller asserts an tracking acceleration signal obtained from a tracking word line of the memory device to activate one or more first tracking arrays of the plurality of tracking arrays to pull down a voltage level of a tracking bit line.
    Type: Application
    Filed: June 6, 2023
    Publication date: December 12, 2024
    Inventors: CHIEN-YUAN CHEN, HAU-TAI SHIEH, CHENG HUNG LEE
  • Patent number: 12156908
    Abstract: The present disclosure provides virus like nanoparticles (VLPs), which are capable of displaying multiple copies of a SARS-CoV-2 antigen, for eliciting protective immunity against a SARS-CoV-2 infection, as well as polypeptides, compositions and methods thereof.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: December 3, 2024
    Assignees: Regents of the University of Minnesota, New York Blood Center, Inc.
    Inventors: Frank Jonathan Lee, Qibin Geng, Jian Shang, Marc Jenkins, Sung-Wook Hong, Lanying Du, Wanbo Tai, Yushun Wan
  • Publication number: 20240395766
    Abstract: A method includes determining a first offset between a first alignment mark on a first side of a first wafer and a second alignment mark on a second side of the first wafer; aligning the first alignment mark of the first wafer to a third alignment mark on a first side of a second wafer, which includes detecting a location of the second alignment mark of the first wafer; determining a location of the first alignment mark of the first wafer based on the first offset and the location of the second alignment mark of the first wafer; and, based on the determined location of the first alignment mark, repositioning the first wafer to align the first alignment mark to the third alignment mark; and bonding the first side of the first wafer to the first side of the second wafer to form a bonded structure.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Kai-Tai Chang, Tung Ying Lee
  • Patent number: 12152305
    Abstract: An aluminum alloy-plated steel sheet having excellent workability and corrosion resistance and a method for manufacturing the same are disclosed. The aluminum alloy-plated steel sheet that includes a base sheet, and an alloy-plated layer formed on the base sheet. Interfacial roughness between the alloy-plated layer and the base steel sheet is 25. ?m or less. Such an aluminum alloy-plated steel sheet prevents microcracks generated during hot forming and has excellent seizure resistance and corrosion resistance. A method for manufacturing such an aluminum alloy-plated steel is also disclosed.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: November 26, 2024
    Assignee: POSCO
    Inventors: Suk-Kyu Lee, Hyeon-Seok Hwang, Myung-Soo Kim, Jong-Gi Oh, Kwang-Tai Min
  • Publication number: 20240387296
    Abstract: Methods of conducting electrical tests on semiconductor packages are provided. A method according to the present disclosure includes forming a build-up structure that includes a plurality of metal layers embedded a plurality of dielectric layers, forming a core structure that embeds a passive device, performing a first electrical test on the build-up structure, performing a second electrical test on the core structure, and after performing the first electrical test and the second electrical test, bonding the build-up structure to the core structure.
    Type: Application
    Filed: August 25, 2023
    Publication date: November 21, 2024
    Inventors: Ya Huei Lee, Ping Tai Chen, Kuo-Ching Hsu
  • Publication number: 20240387546
    Abstract: A semiconductor structure includes a first transistor and a second transistor. The first transistor includes a first fin structure and a first metal gate over the first fin structure. The first metal gate includes a first work function metal layer and a first gap-filling metal layer. The second transistor includes a second fin structure and a second metal gate over the second fin structure. The second metal gate includes a second work function metal layer and a second gap-filling metal layer. The first metal gate and the second metal gate provide a same work function. A width of the first metal gate is equal to a width of the second metal gate. A width of a top surface of the first gap-filling metal layer is greater than a width of a top surface of the second gap-filling metal layer.
    Type: Application
    Filed: May 18, 2023
    Publication date: November 21, 2024
    Inventors: PO-YING CHANG, WEN-LANG WU, CHANG-TAI LEE, LI-CHUNG KUO, YUN-HAN LIN, CHEN-CHUAN YANG
  • Publication number: 20240383095
    Abstract: Described herein are multi-layered windows for use in chemical-mechanical planarization (CMP) systems and CMP processes. The multi-layered windows of the present disclosure include a transparent structural layer and a hydrophilic surfactant applied to at least a portion of at least one surface of the transparent structural layer. Such multi-layered windows may be in the polishing pad, the platen, or both.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Inventors: Shih-Chung CHEN, Yi-Shao LIN, Sheng-Tai PENG, Ya-Jen SHEUH, Hung-Lin CHEN, Ren-Dou LEE
  • Publication number: 20240388649
    Abstract: An interactive control device includes a housing, a touch display panel and a face cover. The touch display panel is disposed within the housing. The face cover has a front surface and a rear surface. A first hollow configuration is formed on the front surface of the face cover, the face cover is detachably assembly with the housing and placed over the touch display panel, and a display area and a touch area of the touch display panel are limited by the first hollow configuration.
    Type: Application
    Filed: December 12, 2023
    Publication date: November 21, 2024
    Inventors: Yung-Tai Pan, Wen-Hsien Chan, Rong-Fu Lee, I-Min Shu, Wei-Ching Kuo, Bo-An Chen
  • Patent number: 12138735
    Abstract: Described herein are multi-layered windows for use in chemical-mechanical planarization (CMP) systems and CMP processes. The multi-layered windows of the present disclosure include a transparent structural layer and a hydrophilic surfactant applied to at least a portion of at least one surface of the transparent structural layer. Such multi-layered windows may be in the polishing pad, the platen, or both.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: November 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chung Chen, Yi-Shao Lin, Sheng-Tai Peng, Ya-Jen Sheuh, Hung-Lin Chen, Ren-Dou Lee
  • Patent number: 12140957
    Abstract: The present application is to provide a system for sensing and responding to a lateral blind spot of a mobile carrier and method thereof, which is applied for a mobile carrier during moving to a parking place. Firstly, a light scan unit and a depth image capture unit are used to scan a plurality of surrounding objects and capture a plurality of object depth images of the surrounding objects, and then a plurality of screened images are obtained according to a moving route of the mobile carrier for further obtaining correspondingly a plurality of forecasted lines to generate corresponded notice message for noting driver or ADAS. Due to the objects corresponding to the screened images and located on a blind position which is at one side of the mobile carrier, the notice message provides the driver preventing from the ignored danger by ignoring the blind position.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: November 12, 2024
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Tsung-Han Lee, Jinn-Feng Jiang, Shih-Chun Hsu, Tsu-Kun Chang, Cheng-Tai Lei, Hung-Yuan Wei
  • Publication number: 20240363456
    Abstract: A gas-permeable package lid of a chip package structure and a manufacturing method thereof are provided. The gas-permeable package lid of the chip package structure includes a lid body, an air hole, and a hydrophobic gas-permeable membrane. The lid body is integrally formed with an encapsulation material and has a body portion and a plurality of anchors. The air hole penetrates the body portion of the lid body. The hydrophobic gas-permeable membrane is bonded to the lid body and has a shielding part shielding the air hole and an embedded part embedded in the lid body. The embedded part has an upper surface and a lower surface. The upper surface and the lower surface respectively have a plurality of recesses. The anchors are respectively located in the recesses.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 31, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Lung-Tai Chen, Chin-Sheng Chang, Bor-Shiun Lee, Liang-Ju Chien
  • Publication number: 20240353956
    Abstract: The present invention relates to a touch module and a touch screen. The touch module includes a touch panel located on the display module, a main circuit board located outside the casing of the touch screen, a plurality of signal cables connecting the touch panel and the main circuit board, and an equal potential wiring. By setting an equal potential wiring in the touch module to electrically bridge any two signal cables, a short circuit is formed between the shielding layers of the signal cables so that the potentials of different signal cables can be equalized to make the signal cables roughly the same degree of electrostatic or electromagnetic interference from the environment. By making the signals obtained by the signal cables be disturbed to approximately the same degree, the touch module can accurately determine the touch position.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 24, 2024
    Inventors: Chin-Fu CHANG, Shang-Tai YEH, Cheng-Han LEE
  • Publication number: 20240346619
    Abstract: An image capturing device and a zooming method for a depth-of-field image thereof are disclosed. The method is adapted to the image capturing device including a first lens module and a second lens module, and includes the following steps. In response to a photographing instruction, a first image and a second image are acquired respectively by using the first lens module and the second lens module. A digital zoom processing is respectively performed on the first image and the second image to generate a first zooming image and a second zooming image. A depth-of-field composite processing is performed according to the first zooming image and the second zooming image to generate a zooming depth-of-field image. The zooming depth-of-field image is recorded in a photo gallery.
    Type: Application
    Filed: November 6, 2023
    Publication date: October 17, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventor: Chang-Tai Lee
  • Publication number: 20240316773
    Abstract: A method for path planning of a robot arm in a dynamic environment includes steps as follows. During an operation of the robot arm in a three-dimensional environment, a state of an obstacle is obtained in real time, and when a collision danger occurs, the robot arm is allowed to dodge the obstacle. In the collision danger, a partial path of the robot arm is re-planned based on a hybrid RRT, so that the robot arm avoids dynamic and static obstacles in an environment and then returns to an original path for continuing operation.
    Type: Application
    Filed: June 26, 2023
    Publication date: September 26, 2024
    Inventors: Kai-Tai SONG, Chuan-Che LEE
  • Publication number: 20240311542
    Abstract: A rectilinear-block placement method includes disposing a first sub-block of each flexible block on a layout area of a chip canvas according to a reference position, generating an edge-depth map relative to first sub-blocks of flexible blocks on the layout area, predicting positions of second sub-blocks of the flexible blocks with depth values on the edge-depth map by a machine learning model, and positioning the second sub-blocks on the layout area according to the predicted positions of the second sub-blocks of the flexible blocks.
    Type: Application
    Filed: December 27, 2023
    Publication date: September 19, 2024
    Applicant: MEDIATEK INC.
    Inventors: Jen-Wei Lee, Yi-Ying Liao, Te-Wei Chen, Kun-Yu Wang, Sheng-Tai Tseng, Ronald Kuo-Hua Ho, Bo-Jiun Hsu, Wei-Hsien Lin, Chun-Chih Yang, Chih-Wei Ko, Tai-Lai Tung
  • Publication number: 20240303408
    Abstract: The application discloses a method and a system for shaping flexible blocks on a chip canvas in an integrated circuit design. An input is received describing geometric features of flexible blocks. A set of flexible blocks are generated based on the input. Obtained block areas of the set of flexible blocks are computed. Whether the set of flexible blocks are legal is determined based on determining whether area differences between the obtained block areas and a plurality of required areas for the set of flexible blocks meet a requirement. The set of flexible blocks are updated until the set of flexible blocks are all legal.
    Type: Application
    Filed: March 7, 2024
    Publication date: September 12, 2024
    Inventors: Kun-Yu WANG, Sheng-Tai TSENG, Yi-Ying LIAO, Jen-Wei LEE, Ronald Kuo-Hua HO, Bo-Jiun HSU, Te-Wei CHEN, Chun-Chih YANG, Tai-Lai TUNG
  • Publication number: 20240289008
    Abstract: A mobile electronic device and an operation interface adjustment method thereof are provided. The method is adapted to the mobile electronic device including a touch screen and includes the following steps. An application (app) is launched. A handedness status is determined. A display position of each of a plurality of control options in an operation interface of the app is determined according to the handedness status and a frequency of use of each of the control options of the app. The operation interface including the control options is displayed via a touch screen according to the display position of each of the control options in the operation interface.
    Type: Application
    Filed: November 5, 2023
    Publication date: August 29, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventor: Chang-Tai Lee
  • Publication number: 20240281082
    Abstract: A touch display device includes a plurality of light emitting elements arranged on a substrate, an encapsulation layer arranged on the light emitting elements, a plurality of first touch electrodes arranged on the encapsulation layer, and a plurality of second touch electrodes arranged on the encapsulation layer and spaced apart from and adjacent to the first touch electrodes. At least one of the first touch electrodes may include a plurality of first protrusions extending in a first direction. At least one of the second touch electrodes may include a plurality of second protrusions extending in a second direction opposite the first direction. One of the first protrusions and another of the first protrusions adjacent to the one of the first protrusions may have different lengths from each other in the first direction.
    Type: Application
    Filed: May 1, 2024
    Publication date: August 22, 2024
    Applicant: LG Display Co., Ltd.
    Inventors: Sul-Ki KIM, Gue-Tai LEE, Jin-Yeol KIM
  • Publication number: 20240266266
    Abstract: A semiconductor structure includes: an interposer including an integrated passive device, a die-side redistribution structure, first on-interposer bump structures, and second on-interposer bump structures. First die-side redistribution wiring interconnects electrically connect electrical nodes within the integrated passive device to the first on-interposer bump structures. Second die-side redistribution wiring interconnects provide a respective electrical connection between a respective pair of second on-interposer bump structures. A first semiconductor die includes first on-die bump structures that are bonded to the first on-interposer bump structures through first solder material portions, and further includes second on-die bump structures that are bonded to the second on-interposer bump structures through second solder material portions.
    Type: Application
    Filed: May 24, 2023
    Publication date: August 8, 2024
    Inventors: Kuo-Ching Hsu, Hsiang-Tai Lu, Kuan-Lung Wu, Ya Huei Lee