Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.

Abstract: A method for generating a random number is used for a plurality of blocks in a blockchain. The method comprises the steps of: selecting a committee comprising a subset of nodes from the blockchain; executing a distributed key generation to generate a share key and a public key at each of the nodes, wherein the public key further comprises a set of verification keys; broadcasting a share signature from each of the nodes; executing a threshold signature at each of the nodes when a new block is generated; and executing a random number which is a hash value of the threshold signature which is combined from a plurality of partial signature generated from the nodes.

Abstract: A method for building agreements among a plurality of nodes in a distributed system to improve the throughput of the distributed system is disclosed. The method comprises performing a first Byzantine Agreement protocol; selecting a first leader node from the plurality of nodes; broadcasting a fast message from the first leader node to all other nodes when a clock is equal to 0; determining whether the first leader node decides a block according to a number of a plurality of fast-vote messages received from all other nodes by the first leader node and a value of the clock; and performing a second Byzantine Agreement protocol if it is determined that the first leader node cannot decide a block.

Abstract: A method for a node to issue a new block is used for a distributed system in which transactions and records are organized in block. The method comprises the steps of: determining a value R from a common reference string; computing a value s associated to a value of a status with a private key at a node, wherein the private key is a private signing key corresponding to the node, and the value s can only be computed by the node with the private key; computing a value r by taking the value s into a function H at the node, wherein the value r is unpredictable and unique to other nodes; and determining whether the node obtains a right to issue a new block by taking the values R and r into a function V.

Abstract: A backlight driving circuit includes a scan driver operatively associated with pixel circuits in a matrix formation, and a backlight driver. The scan driver activates the pixel circuits in a row-by-row manner within a frame interval for provision of data voltages to the pixel circuits in each row of the matrix formation, respectively. The backlight driver adjusts a duty cycle of a backlight driving signal for a backlight source such that the backlight source is deactivated when at least one of the pixel circuits is yet to be activated within the frame interval, and adjusts the duty cycle to gradually increase brightness of light output from the backlight source when all of the pixel circuits have been activated within the frame interval.

Abstract: A scan line driving method of a liquid crystal display divides scan times of a first scan line and a second scan line so that enabled times of the first scan line and the second scan line respectively equal a charge time and a discharge time. The first scan line and the second scan line respectively control a first row of pixels and a second row of pixels of the liquid crystal display.

Abstract: A transflective liquid crystal display includes a plurality of pixels. Each pixel includes a plurality of primary color sub-pixels and a brightness-enhancing sub-pixel. The reflective region of the transflective liquid crystal display is formed only on the brightness-enhancing sub-pixel.

Abstract: A thin film transistor substrate includes a transparent substrate, a plurality of thin film transistors, a passivation insulating layer and a plurality of pixel electrodes. The thin film transistors are disposed on the transparent substrate and include a gate insulating film. The passivation insulating layer is disposed on the gate insulating film and covers the thin film transistors, wherein the passivation insulating layer is formed with a concave-convex surface, a plurality of contact holes and a plurality of light-transmissive regions, and the light-transmissive regions are located above the gate insulating film. The pixel electrodes are disposed on the concave-convex surface and the light-transmissive regions, wherein each pixel electrode is electrically connected to the thin film transistor via the contact hole.

Abstract: A method of correcting a lithographic process is provided. A physical vapor deposition process (PVD) is performed to deposit a film on a wafer. The asymmetrical deposition of the film on the sidewalls of an opening is related to the change of target consumption in the PVD process. Therefore, the positional shift in an overlay mark may change each time. However, a formula relating target consumption with the degree of positional shift can be derived. The formula is recorded by a controller system. A compensation value can be obtained from the controller system and fed back in a subsequent lithographic process. Thereafter, a photoresist layer is formed on the film and a lithographic process is performed to pattern the photoresist. Since the compensation value can be fed back in the lithographic process via the controller system to correct for the positional shift in the overlay mark resulting from target consumption in the PVD process, errors in measuring the overlay mark can be reduced.

Abstract: A portable exercising apparatus includes a holder block fixedly mounted inside a housing and defining a transverse track, a slide slidably mounted in the track of the holder block, two pull belts respectively fastened to one end of the track and the slide and extended out of two opposite lateral sides of the housing for pulling by the user to exercise the muscles of the arms, and a damping spring member mounted inside the housing for imparting a damping resistance to the slide upon movement of the slide by the user.

Abstract: A method of correcting a lithographic process is provided. A physical vapor deposition process (PVD) is performed to deposit a film on a wafer. The asymmetrical deposition of the film on the sidewalls of an opening is related to the change of target consumption in the PVD process. Therefore, the positional shift in an overlay mark may change each time. However, a formula relating target consumption with the degree of positional shift can be derived. The formula is recorded by a controller system. A compensation value can be obtained from the controller system and fed back in a subsequent lithographic process. Thereafter, a photoresist layer is formed on the film and a lithographic process is performed to pattern the photoresist. Since the compensation value can be fed back in the lithographic process via the controller system to correct for the positional shift in the overlay mark resulting from target consumption in the PVD process, errors in measuring the overlay mark can be reduced.

Abstract: A physical vapor deposition apparatus is provided. The physical vapor deposition apparatus comprises: a reaction chamber; and an electromagnet magnetron device disposed above and outside said reaction chamber, wherein when performing a physical vapor deposition process, the magnetic poles of said electromagnet magnetron device are reversed in-situ to reduce the possibility of asymmetric deposition of the thin film on the sidewalls of the opening.

Abstract: An apparatus for physical vapor deposition (PVD) is described. The apparatus includes a chamber, a target back plate, a wafer base, a target and a mobile magnetron device. The target back plate is located over a top surface of the chamber, and the wafer base is located over a bottom surface of the chamber. The target is located over a surface of the target back plate facing the wafer base. Further, the mobile magnetron device is located outside the chamber and above the target. The PVD apparatus can be used that the distance between a magnetic pole of the mobile magnetron device and a bombardment surface of the target is kept constant by adjusting the position of the mobile magnetron device. Therefore, the intensity of magnetic field induced throughout the bombardment surface of the target can also be maintained at a constant value.

Abstract: A multi-level memory cell has a substrate, a first floating gate, a second floating gate and a control gate. A first doped region, a second doped region and a channel region located between the first doped region and the second doped region are provided in the substrate. The first floating gate is located over the channel region near the first doped region. The second floating gate is located over the channel region near the second doped region and isolated from the first floating gate. A control gate is located over the first and the second floating gates. When writing operations are proceeding, the bias voltages of the control gates are the same, and a constant bias voltage is provided on the first doped region or the second doped region depending on which binary states 11, 10, 01 or 00 are to write. Furthermore, the same bias voltage is used on the control gate during writing operation. Thus, the memory per unit chip area is enhanced and the peripheral circuits are simplified.