Abstract: A clock signal generation apparatus containing variable delay devices for varying the delay time of two-phase clock signals used in a load circuit that uses non-overlap clock signals; a non-overlap detector for detecting a non-overlap time in the H-level zones of the two-phase clock signals and outputting a detection signal corresponding to the non-overlap time; and a control signal generation section for generating a control signal that is used to control the variable delay devices on the basis of the detection signal from the non-overlap detector, and capable of securely generating the two-phase clock signals having an optimal non-overlap time while absorbing fluctuations due to temperature characteristics, power supply voltage characteristics and individual differences in components.

Abstract: In a delta-sigma modulator circuit, an integrator integrates an input signal, and a quantization circuit quantizes the integrated signal with a predetermined quantization number, and outputs a quantization result signal. A DA converter circuit outputs an analog signal indicating a DA conversion result based on the quantization result signal. An oscillation detector circuit detects that the integrator is in an oscillation state based on the integrated signal, and outputting an oscillation detection signal. A reset circuit resets the integrator based on the oscillation detection signal.

Abstract: A transmitter according to the present invention is a transmitter conforming to the EER method, wherein a modulated signal is separated into phase and amplitude components, and the components are input to the high-frequency input terminal and the power supply voltage terminals of a high-frequency power amplifier. This transmitter comprises an amplitude delay corrector and a phase delay corrector capable of correcting delay time so that the phase and amplitude components are optimally synthesized using two or more stages of saturation-type amplifiers constituting the high-frequency power amplifier. With this configuration, a synthesis error can be reduced in each stage of the saturation-type amplifier, and distortion components in the output waveform can be reduced.

Abstract: In a delta-sigma modulator including first and second subtractors, first and second integrators, a quantizer, and a DA converter, a first feedback circuit includes first charge holding circuits which hold charges of the analog signal from the DA converter for different sampling intervals, can change a feedback amount of the analog signal from the DA converter, and outputs the analog signal from each first charge holding circuits to the second subtractor. A second feedback circuit includes second charge holding circuits which hold charges of the analog signal from the second integrator for different sampling intervals, can change a feedback amount of the analog signal from the second integrator, and outputs an analog signal from each of the second charge holding circuits to the second subtractor. A controller switches an order of filter characteristic of the delta sigma modulator by changing feedback amounts of the first and second feedback circuits.

Abstract: The present invention is intended to attain simplified circuit configuration and low current consumption in a discrete time amplifier circuit and an AD converter, to improve the convergence from the transient response state to the steady state of the amplifier circuit and to reduce noise and distortion owing to the variation in the output common-mode voltage. The discrete time amplifier circuit and the AD converter are provided with a switched-capacitor common-mode feedback (CMFB) circuit capable of detecting and feeding back the output common-mode voltage at every sampling timing in the case that the circuit operates at double sampling timing (every ½ cycle).

Abstract: To provide a method of controlling a delta-sigma modulator and a delta-sigma modulator capable of suppressing a consumption power and also improving a signal-to-noise ratio by implementing both the zero-point shifting technology and the double sampling technology simultaneously, a delta-sigma modulator includes a first integrator (1), a second integrator (2), a third integrator (3), a local feedback (4), delay units (5), a quantizer (6), a DA converter (7), gains (8a to 8c) of the DA converter, gains (9a to 9c) of the integrators, adders (10), no-delay integrators (11) each having a gain “1”, a gain (12) of the local feedback, a DAC (13) of a gain “1”, a delay unit (5) for delaying output signals of the DA converter (7), and a delay unit (5) for delaying an output signal of the local feedback (4).

Abstract: An A/D converter includes a first switched capacitor block that charges and holds charges by connecting each of a first group of capacitors to a single basic reference voltage at a first timing, and discharges each of the charges held by the first group of capacitors at a second timing, a second switched capacitor block that charges and holds each of the charges discharged by the first group of capacitors respectively in the second group of capacitors at the second timing, and converts each of the charges held by the second group of capacitors to a voltage and outputs the voltages at the first timing, and a quantizer that quantizes an analog input signal using the plurality of voltages output from the second switched capacitor block as reference voltages for each level. A plurality of reference voltages is generated from a single basic reference voltage, based on different amounts of charges held in the plurality of capacitors.

Abstract: The output of a first integrator is quantized in a quantizer. The quantized signal is subjected to D/A conversion, successively output to a plurality of output paths by a first switching circuit, sampled and held by a plurality of charge-holding circuits of a first feedback circuit, and successively output by a second switching circuit to one of the input terminals of a subtractor. On the other hand, the output signal of the first integrator is successively output by a third switching circuit to a plurality of output paths, sampled and held by a plurality of charge-holding circuits of a second feedback circuit, and successively input to the other input terminal of the subtractor by a fourth switching circuit along with signals held in an input portion, which samples and holds input analog signals. By doing so, a plurality of signals with different sampling timings are integrated accumulatively by the subtractor and the first integrator.

Abstract: In a delta-sigma modulator circuit, an integrator integrates an input signal, and a quantization circuit quantizes the integrated signal with a predetermined quantization number, and outputs a quantization result signal. A DA converter circuit outputs an analog signal indicating a DA conversion result based on the quantization result signal. An oscillation detector circuit detects that the integrator is in an oscillation state based on the integrated signal, and outputting an oscillation detection signal. A reset circuit resets the integrator based on the oscillation detection signal.

Abstract: In a delta-sigma modulator including first and second subtractors, first and second integrators, a quantizer, and a DA converter, a first feedback circuit includes first charge holding circuits which hold charges of the analog signal from the DA converter for different sampling intervals, can change a feedback amount of the analog signal from the DA converter, and outputs the analog signal from each first charge holding circuits to the second subtractor. A second feedback circuit includes second charge holding circuits which hold charges of the analog signal from the second integrator for different sampling intervals, can change a feedback amount of the analog signal from the second integrator, and outputs an analog signal from each of the second charge holding circuits to the second subtractor. A controller switches an order of filter characteristic of the delta sigma modulator by changing feedback amounts of the first and second feedback circuits.

Abstract: In a transmitter of the present invention, a modulated signal is separated into an amplitude component and a phase component which are inputted to a radio-frequency modulated signal input terminal and a supply voltage terminal of a radio-frequency power amplifier. A voltage adjustment circuit is provided between an output terminal of the radio-frequency power amplifier and an amplitude amplification circuit having a feedback circuit. The voltage adjustment circuit changes the amount of isolation in accordance with the voltage level of the amplitude component. By this, the amplitude component of the radio-frequency modulated wave attenuates the level inputted to the feedback circuit of the amplitude amplification circuit through the supply voltage terminal of the radio-frequency power amplifier.

Abstract: The output of a first integrator is quantized in a quantizer. The quantized signal is subjected to D/A conversion, successively output to a plurality of output paths by a first switching circuit, sampled and held by a plurality of charge-holding circuits of a first feedback circuit, and successively output by a second switching circuit to one of the input terminals of a subtractor. On the other hand, the output signal of the first integrator is successively output by a third switching circuit to a plurality of output paths, sampled and held by a plurality of charge-holding circuits of a second feedback circuit, and successively input to the other input terminal of the subtractor by a fourth switching circuit along with signals held in an input portion, which samples and holds input analog signals. By doing so, a plurality of signals with different sampling timings are integrated accumulatively by the subtractor and the first integrator.

Abstract: An A/D converter includes a first switched capacitor block that charges and holds charges by connecting each of a first group of capacitors to a single basic reference voltage at a first timing, and discharges each of the charges held by the first group of capacitors at a second timing, a second switched capacitor block that charges and holds each of the charges discharged by the first group of capacitors respectively in the second group of capacitors at the second timing, and converts each of the charges held by the second group of capacitors to a voltage and outputs the voltages at the first timing, and a quantizer that quantizes an analog input signal using the plurality of voltages output from the second switched capacitor block as reference voltages for each level. A plurality of reference voltages is generated from a single basic reference voltage, based on different amounts of charges held in the plurality of capacitors.

Abstract: To provide a method of controlling a delta-sigma modulator and a delta-sigma modulator capable of suppressing a consumption power and also improving a signal-to-noise ratio by implementing both the zero-point shifting technology and the double sampling technology simultaneously, a delta-sigma modulator includes a first integrator (1), a second integrator (2), a third integrator (3), a local feedback (4), delay units (5), a quantizer (6), a DA converter (7), gains (8a to 8c) of the DA converter, gains (9a to 9c) of the integrators, adders (10), no-delay integrators (11) each having a gain “1”, a gain (12) of the local feedback, a DAC (13) of a gain “1”, a delay unit (5) for delaying output signals of the DA converter (7), and a delay unit (5) for delaying an output signal of the local feedback (4).

Abstract: A transmitter according to the present invention is a transmitter conforming to the EER method, wherein a modulated signal is separated into phase and amplitude components, and the components are input to the high-frequency input terminal and the power supply voltage terminals of a high-frequency power amplifier. This transmitter comprises an amplitude delay corrector and a phase delay corrector capable of correcting delay time so that the phase and amplitude components are optimally synthesized using two or more stages of saturation-type amplifiers constituting the high-frequency power amplifier. With this configuration, a synthesis error can be reduced in each stage of the saturation-type amplifier, and distortion components in the output waveform can be reduced.

Abstract: The operational amplifier outputs a signal for switching a switch circuit from a drive circuit according to signal amplitude information inputted from a signal source to thereby switch a plurality of supply voltages of a power amplification circuit arranged in an output portion. As a result of this, needed minimum DC power required for linear amplification for the voltage amplitude to be outputted can be provided to the power amplification circuit, allowing the operational amplifier to achieve an improvement in efficiency.

Abstract: An amplitude component and a phase component of a modulated signal are inputted into a power supply terminal and an input terminal of an RF power amplifier, respectively, and a modulated wave that is produced by demodulating an original modulated signal is obtained from the RF power amplifier. A supply voltage is supplied to an emitter follower and an operational amplifier via a switch group from a DC-DC converter group whose output voltages are sequentially different. As the supply voltage, any pair of outputs of DC-DC converters by the switch group is selected according to levels of the amplitude component, and provides them to the emitter follower and the operational amplifier. The emitter follower performs a DC conversion of the provided supply voltage to provide it to the RF power amplifier.

Abstract: In a transmitter of the present invention, a modulated signal is separated into an amplitude component and a phase component which are inputted to a radio-frequency modulated signal input terminal and a supply voltage terminal of a radio-frequency power amplifier. A voltage adjustment circuit is provided between an output terminal of the radio-frequency power amplifier and an amplitude amplification circuit having a feedback circuit. The voltage adjustment circuit changes the amount of isolation in accordance with the voltage level of the amplitude component. By this, the amplitude component of the radio-frequency modulated wave attenuates the level inputted to the feedback circuit of the amplitude amplification circuit through the supply voltage terminal of the radio-frequency power amplifier.

Abstract: An amplitude component and a phase component of a modulated signal are inputted into a power supply terminal and an input terminal of an RF power amplifier, respectively, and a modulated wave that is produced by demodulating an original modulated signal is obtained from the RF power amplifier. A supply voltage is supplied to an emitter follower and an operational amplifier via a switch group from a DC-DC converter group whose output voltages are sequentially different. As the supply voltage, any pair of outputs of DC-DC converters by the switch group is selected according to levels of the amplitude component, and provides them to the emitter follower and the operational amplifier. The emitter follower performs a DC conversion of the provided supply voltage to provide it to the RF power amplifier.

Abstract: In a range (R3) in which an amplitude component voltage (VA) of a modulation wave signal from an OFDM signal generation unit corresponds to the average output power, an output voltage of a first voltage conversion unit (voltage applied to a base or a gate) is fixed, thus allowing the class AB operation of a high-frequency power amplifier. In a range (R4) in which VA is larger than that in R3, the output voltage of the first voltage conversion unit is increased, thus varying the operating class of the high-frequency power amplifier from class AB to class A. In a range (R2) in which VA is smaller than that in R3, the output voltage of the first voltage conversion unit is decreased, thus varying the operating class of the high-frequency power amplifier from class AB to class B. The efficiency at the time of the average power can be improved without degrading the maximum output power of the high-frequency power amplifier included in a transmitter.