Patents by Inventor Taizo Shirai

Taizo Shirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8340282
    Abstract: A high-security cryptanalysis-resistant cryptographic processing apparatus and a cryptographic processing method are provided. A Feistel common key block cipher is produced by repeatedly performing an SPN-type F-function including a nonlinear transformation part and a linear transformation part over a plurality of rounds. In each round, a linear transformation process is performed according to an F-function using a matrix determined so as to satisfy a relatively loose constraint whereby high resistance to differential attacks and/or linear attacks is achieved. The relatively loose constraint allows an increase in the number of candidates for usable matrices, and it is possible to maintain the number of active S-boxes to a sufficiently large level.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventor: Taizo Shirai
  • Publication number: 20120324243
    Abstract: A processing unit transforms first input information into first nonlinear transformed information that is transformed into first linear transformed information, and transforms second input information into second nonlinear transformed information that is transformed into second linear transformed information. An exclusive- or section performs an exclusive- or operation based on the first and second linear transformed information. When the first nonlinear and linear transformed information are expressed as a first and second sequence vector, respectively, and the second nonlinear and linear transformed information are expressed as a third and fourth sequence vector, respectively, then a first row vector chosen from a first inverse matrix of a first matrix that transforms the first sequence vector to the second sequence vector, and a second row vector chosen from a second inverse matrix of a second matrix that transforms the third sequence vector to the fourth sequence vector, are linearly independent.
    Type: Application
    Filed: August 24, 2012
    Publication date: December 20, 2012
    Applicant: SONY CORPORATION
    Inventors: Taizo SHIRAI, Bart Preneel
  • Patent number: 8306217
    Abstract: There is provided a highly secure cryptographic processing apparatus and method where an analysis difficulty is increased. In a Feistel type common key block encrypting process in which an SPN type F function having a nonlinear conversion section and a linear conversion section is repeatedly executed a plurality of rounds. The linear conversion process of an F function corresponding to each of the plurality of rounds is performed as a linear conversion process which employs an MDS (Maximum Distance Separable) matrix, and a linear conversion process is carried out which employs a different MDS matrix at least at each of consecutive odd number rounds and consecutive even number rounds. This structure makes it possible to increase the minimum number (a robustness index against a differential attack in common key block encryption) of the active S box in the entire encrypting function.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: November 6, 2012
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Kyoji Shibutani
  • Patent number: 8295478
    Abstract: To realize an extended-Feistel-type common-key block-cipher process configuration for realizing a diffusion-matrix switching mechanism (DSM). In a cryptographic process configuration in which an extended Feistel structure having a number of data lines: d that is set to an integer satisfying d?3 is applied, a plurality of multiple different matrices are selectively applied to linear transformation processes performed in F-function sections. A plurality of different matrices satisfying a condition in which a minimum number of branches for all of the data lines is equal to or more than a predetermined value are selected as the matrices, each of the minimum numbers of branches corresponding to the data lines being based on linear transformation matrices included in F-functions that are input to a corresponding data line in the extended Feistel structure.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: October 23, 2012
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Kyoji Shibutani
  • Patent number: 8290148
    Abstract: An encryption processing apparatus for performing common-key blockcipher processing, the encryption processing apparatus includes an encryption processing part that performs data transformation in which a round function is iterated for a plurality of rounds; and a key scheduling part that generates round keys used to execute the round function. The key scheduling part is configured to repeatedly apply an xs times multiplication over an extension field GF(2m), generated by an m-th order irreducible polynomial f(x) defined over GF(2), to an m-bit intermediate key generated by transformation of a secret key to generate a plurality of different round intermediate keys serving as data for generating a plurality of different round keys.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: October 16, 2012
    Assignee: Sony Corporation
    Inventors: Toru Akishita, Taizo Shirai, Kyoji Shibutani, Shiho Moriai
  • Patent number: 8275127
    Abstract: The invention realizes a high-security cryptographic processing apparatus that increases difficulty in analyzing its key and a method therefor. In Feistel-type common-key-block cryptographic processing that repeatedly executes an SPN-type F-function having the nonlinear conversion section and the linear conversion section over a plurality of rounds, Linear conversion processing of an F-function corresponding to each of the plurality of rounds is carried out by linear conversion processing that applies square MDS (Maximum Distance Separable) matrices. The invention uses a setting that arbitrary m column vectors included in inverse matrices of square MDS matrices being set up at least in consecutive even-numbered rounds and in consecutive odd-numbered rounds, respectively, constitute a square MDS matrix. This structure realizes cryptographic processing whereby resistance to linear cryptanalysis attacks in the common-key-block cipher is improved.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: September 25, 2012
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Bart Preneel
  • Publication number: 20120233704
    Abstract: Provided is an information processing apparatus for realizing an electronic signature system of the MPKC signature method capable of safety certification with respect to chosen-message attack.
    Type: Application
    Filed: September 21, 2010
    Publication date: September 13, 2012
    Inventors: Koichi Sakumoto, Taizo Shirai, Harunaga Hiwatari
  • Publication number: 20120191986
    Abstract: In extended Feistel type common key block cipher processing, a configuration is realized in which an encryption function and a decryption function are commonly used. In a cryptographic processing configuration to which an extended Feistel structure in which the number of data lines d is set to an integer satisfying d?3 is applied, involution properties, that is, the application of a common function to encryption processing and decryption processing, can be achieved. With a configuration in which round keys are permuted or F-functions are permuted in the decryption processing, processing using a common function can be performed by setting swap functions for the encryption processing and the decryption processing to have the same processing style.
    Type: Application
    Filed: March 30, 2012
    Publication date: July 26, 2012
    Inventors: Kyoji SHIBUTANI, Taizo Shirai, Toru Akishita, Shiho Moriai
  • Patent number: 8165288
    Abstract: In extended Feistel type common key block cipher processing, a configuration is realized in which an encryption function and a decryption function are commonly used. In a cryptographic processing configuration to which an extended Feistel structure in which the number of data lines d is set to an integer satisfying d?3 is applied, involution properties, that is, the application of a common function to encryption processing and decryption processing, can be achieved. With a configuration in which round keys are permuted or F-functions are permuted in the decryption processing, processing using a common function can be performed by setting swap functions for the encryption processing and the decryption processing to have the same processing style.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: April 24, 2012
    Assignee: Sony Corporation
    Inventors: Kyoji Shibutani, Taizo Shirai, Toru Akishita, Shiho Moriai
  • Patent number: 8073140
    Abstract: It is possible to realize a Feistel-type common key block encryption/decryption processing configuration capable of reducing data stored in a memory at a low cost. The Feistel-type common key block encryption/decryption processing repeatedly executes an SP-type F function having nonlinear and linear transform sections by several rounds. At least one of the nonlinear and linear transform processes executed in the F function in each round is executed as a transform process identical with a transform process applied to an encryption/decryption algorithm other than a Feistel-type common key block encryption/decryption algorithm and/or another hash function such as AES and Whirlpool. With this configuration, it is possible to reduce the design cost and the amount of data stored in a memory.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: December 6, 2011
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Kyoji Shibutani
  • Publication number: 20110296189
    Abstract: Provided is an authentication device including a key setting unit for setting a multi-order polynomial ui(t) (i=1 to n?1) to a secret key and setting a multi-order polynomial f that satisfies f(u1(t), . . . , un-1(t),t)=0 to a public key, a message transmission unit for transmitting a message c to a verifier, a verification pattern reception unit for receiving information on one verification pattern selected by the verifier from k (k?3) verification patterns for one message c, and a response transmission unit for transmitting, to the verifier, response information, among k types of response information, corresponding to the information on the verification pattern received by the verification pattern reception unit. The response information is information that enables calculation of the secret key uiin a case all of the k verification patterns for the message c performed by using the k types of response information have been successful.
    Type: Application
    Filed: May 20, 2011
    Publication date: December 1, 2011
    Inventors: Koichi Sakumoto, Taizo Shirai, Harunaga Hiwatari
  • Publication number: 20110293089
    Abstract: There is provided a highly secure cryptographic processing apparatus and method where an analysis difficulty is increased. In a Feistel type common key block encrypting process in which an SPN type F function having a nonlinear conversion section and a linear conversion section is repeatedly executed a plurality of rounds. The linear conversion process of an F function corresponding to each of the plurality of rounds is performed as a linear conversion process which employs an MDS (Maximum Distance Separable) matrix, and a linear conversion process is carried out which employs a different MDS matrix at least at each of consecutive odd number rounds and consecutive even number rounds. This structure makes it possible to increase the minimum number (a robustness index against a differential attack in common key block encryption) of the active S box in the entire encrypting function.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Inventors: Taizo Shirai, Kyoji Shibutani
  • Publication number: 20110296188
    Abstract: Provided is an authentication device including a key setting unit for setting s?Kn to a secret key and setting a multi-order polynomial fi(x1, . . . , xn) (i=1 to m) on a ring K and yi=fi(s) to a public key, a message transmission unit for transmitting a message c to a verifier, a verification pattern reception unit for receiving information on one verification pattern selected by the verifier from k (k?3) verification patterns for one message c, and a response transmission unit for transmitting, to the verifier, response information, among k types of response information, corresponding to the information on the verification pattern received by the verification pattern reception unit, where the response information is information that enables calculation of the secret key s in a case all of the k verification patterns for the message c performed by using the k types of response information have been successful.
    Type: Application
    Filed: May 19, 2011
    Publication date: December 1, 2011
    Inventors: Koichi SAKUMOTO, Taizo Shirai, Harunaga Hiwatari
  • Publication number: 20110243319
    Abstract: A data conversion algorithm achieving efficient data diffusion is achieved. For example, in a configuration where a various processes are executed on two data segments which are resultants of dividing a rectangular matrix of data containing arranged one-byte data blocks into two parts to perform data conversion, efficient data scrambling with less operation cost is achieved by executing a linear conversion process on one of the data segments, an exclusive OR operation between the two data segments, a shift process on one of the data segments, and a swap process between the two data segments. Moreover, cryptographic processing with a high security level is achieved by including nonlinear conversion or key application operation on the data segments.
    Type: Application
    Filed: January 21, 2009
    Publication date: October 6, 2011
    Inventors: Taizo Shirai, Kyoji Shibutani, Shiho Moriai, Toru Akishita, Tetsu Iwata
  • Patent number: 8031866
    Abstract: There is provided a highly secure cryptographic processing apparatus and method where an analysis difficulty is increased. In a Feistel type common key block encrypting process in which an SPN type F function having a nonlinear conversion section and a linear conversion section is repeatedly executed a plurality of rounds. The linear conversion process of an F function corresponding to each of the plurality of rounds is performed as a linear conversion process which employs an MDS (Maximum Distance Separable) matrix, and a linear conversion process is carried out which employs a different MDS matrix at least at each of consecutive odd number rounds and consecutive even number rounds. This structure makes it possible to increase the minimum number (a robustness index against a differential attack in common key block encryption) of the active S box in the entire encrypting function.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: October 4, 2011
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Kyoji Shibutani
  • Publication number: 20110238636
    Abstract: There is realized a data conversion device that performs generation of a hash value with improved analysis resistance and a high degree of safety. There are provided a stirring processing section performing a data stirring process on input data; and a compression processing section performing a data compression process on input data including data segments which are divisions of message data, the message data being a target of a data conversion. Part of multi-stage compression subsections is configured to perform a data compression process based on both of output of the stirring processing section and the data segments in the message data. There is provided such a configuration that the stirring process is executed at least on fixed timing of a compression processing round of plural rounds and thus, there is realized a data conversion device that performs generation of a hash value with improved analysis resistance and a high degree of safety.
    Type: Application
    Filed: August 25, 2009
    Publication date: September 29, 2011
    Inventors: Taizo Shirai, Kyoji Shibutani, Shiho Moriai, Toru Akishita, Tetsu Iwata
  • Publication number: 20110211688
    Abstract: A construction with an improved compression-function execution section is achieved. A data conversion process with use of a plurality of compression-function execution sections and through a plurality of process sequences in which divided data blocks constituting message data are processed in parallel is executed. Each of the plurality of compression-function execution sections performs a process with use of a message scheduling section which receives a corresponding divided data block of the message data to perform a message scheduling process, and a process with use of a chaining variable processing section which receives both of an output from the message scheduling section and an intermediate value as an output from a preceding processing section to generate output data whose number of bits is same as that of the intermediate value through compression of received data.
    Type: Application
    Filed: August 25, 2009
    Publication date: September 1, 2011
    Inventors: Taizo Shirai, Kyoji Shibutani, Shiho Moriai, Toru Akishita, Tetsu Iwata
  • Patent number: 7996335
    Abstract: Usage rights information indicating a license which is usage rights corresponding to contents is stored in a license storage device, and at the time of using the contents, the rights information is output from the license storage device to a contents using device and further transmitted to a contents distribution server, and legitimacy verification of the rights information is executed at the contents distribution server, such that contents corresponding to the rights information are transmitted to the contents using device. Thus, a device and method is realized whereby distribution of contents over a network and use thereof is enabled without detracting from safety and user convenience.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: August 9, 2011
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Masafumi Kusakawa
  • Patent number: 7925017
    Abstract: An information recording device uses a data storage device such as media having a built-in flash memory. When data is stored in the data storage device, different encryption keys are used for different sectors. Each encryption key is stored in the header of content. By using a single encryption key for a sector consisting of different blocks, the number of stored encryption keys is limited, and the amount of stored key data is reduced. In accordance with the type of encryption processing, for example, the single DES or the triple DES, one or at least two keys are selected for each sector in order to execute encryption or decryption processing on sector data.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: April 12, 2011
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Yoshihito Ishibashi, Kenji Yoshino, Toru Akishita, Takeshi Ito, Shigekazu Hayashi
  • Publication number: 20110026706
    Abstract: The invention realizes a high-security cryptographic processing apparatus that increases difficulty in analyzing its key and a method therefor. In Feistel-type common-key-block cryptographic processing that repeatedly executes an SPN-type F-function having the nonlinear conversion section and the linear conversion section over a plurality of rounds, Linear conversion processing of an F-function corresponding to each of the plurality of rounds is carried out by linear conversion processing that applies square MDS (Maximum Distance Separable) matrices. The invention uses a setting that arbitrary m column vectors included in inverse matrices of square MDS matrices being set up at least in consecutive even-numbered rounds and in consecutive odd-numbered rounds, respectively, constitute a square MDS matrix. This structure realizes cryptographic processing whereby resistance to linear cryptanalysis attacks in the common-key-block cipher is improved.
    Type: Application
    Filed: May 14, 2010
    Publication date: February 3, 2011
    Applicant: Sony Corporation
    Inventors: Taizo SHIRAI, Bart Preneel