Patents by Inventor Takaaki Murakami

Takaaki Murakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6033971
    Abstract: There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that t.sub.G represents a thickness of a gate electrode layer 6, a height t.sub.U to an upper surface of a thickest portion of element isolating oxide film 4 from an upper surface of a gate insulating film 5 and an acute angle .theta.i defined between the upper surfaces of element isolating oxide film 4 and gate insulating film are set within ranges expressed by the formula of {.theta.i, t.sub.U .linevert split.0.ltoreq..theta.i.ltoreq.56.6.degree., 0.ltoreq.t.sub.U .ltoreq.0.82t.sub.G }. Thereby, an unetched portion does not remain at an etching step for patterning the gate electrode layer to be formed later. This prevents short-circuit of the gate electrode. Since the element isolating oxide film has the improved flatness, a quantity of overetching in an active region can be reduced at a step of patterning the gate electrode.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: March 7, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kaoru Motonami, Shigeru Shiratake, Hiroshi Matsuo, Yuichi Yokoyama, Kenji Morisawa, Ritsuko Gotoda, Takaaki Murakami, Satoshi Hamamoto, Kenji Yasumura, Yasuyoshi Itoh
  • Patent number: 6021552
    Abstract: A plate material 1 and piezoelectric ceramics 2 are bonded together through an alloy layer 3 formed by an alloy forming reaction due to the mutual diffusion phenomena between a liquid metal including at least galium and the plate material 1 or the piezoelectric ceramics 2, or the mutual diffusion phenomena between the liquid metal and metal powder. The alloy layer 3 may include at least one or more of indium, tin and zinc and at least one or more of copper, silver, gold, and palladium. Further, a metal may be provided on at least one of the bonded surfaces of the plate material 1 and the piezoelectric ceramics 2. This metal may include one or more of copper, silver, gold, tin and palladum. In addition, a metal layer may be formed on the bonded surface 1a side of the plate material 1. Still further, an amorphous layer may be formed on at least one of the parts between the plate material 1 and the alloy layer 3, and between the piezoelectric ceramics 2 and the alloy layer 3.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: February 8, 2000
    Assignee: Sony Corporation
    Inventors: Koichiro Kishima, Tetsuo Nakayama, Takaaki Murakami
  • Patent number: 5988501
    Abstract: An identification device and method which includes adding an identification pattern to an identification object. The pattern is formed by the absence or presence of identification holes located at a plurality of points on the identification object. In addition, the holes are spaced from one another at a specified pitch. Next, the identification object is transferred along a transfer path parallel to the identification pattern. Then light or an ultrasonic wave is transmitted from one side of the transfer path in a transverse direction of the transfer path. Identification of the identification pattern of the identification object is determined on whether or not the light or the ultrasonic wave is received on the other side of the transfer path.
    Type: Grant
    Filed: February 13, 1997
    Date of Patent: November 23, 1999
    Assignee: Yuyama Mfg. Co., Ltd.
    Inventors: Takaaki Murakami, Kunihiko Kano
  • Patent number: 5898255
    Abstract: A plate material 1 and piezoelectric ceramics 2 are bonded together through an alloy layer 3 formed by an alloy forming reaction due to the mutual diffusion phenomena between a liquid metal including at least galium and the plate material 1 or the piezoelectric ceramics 2, or the mutual diffusion phenomena between the liquid metal and metal powder. The alloy layer 3 may include at least one or more of indium, tin and zinc and at least one or more of copper, silver, gold, and palladium. Further, a metal may be provided on at least one of the bonded surfaces of the plate material 1 and the piezoelectric ceramics 2. This metal may include one or more of copper, silver, gold, tin and palladum. In addition, a metal layer may be formed on the bonded surface 1a side of the plate material 1. Still further, an amorphous layer may be formed on at least one of the parts between the plate material 1 and the alloy layer 3, and between the piezoelectric ceramics 2 and the alloy layer 3.
    Type: Grant
    Filed: July 25, 1996
    Date of Patent: April 27, 1999
    Assignee: Sony Corporation
    Inventors: Koichiro Kishima, Tetsuo Nakayama, Takaaki Murakami
  • Patent number: 5895954
    Abstract: Reverse short-channel effect is suppressed in a field effect transistor with a gate having a short length. The field effect transistor comprises a p-type silicon substrate, a gate electrode, paired lightly doped source/drain regions, and paired heavily doped source/drain regions. A boron concentration peak region is formed in the silicon substrate. A boron concentration peak region positioned at an end of the gate electrode has a length d of one fourth of a length L of the gate electrode, and extends from the end to the center of the gate electrode.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: April 20, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Yasumura, Takaaki Murakami
  • Patent number: 5880507
    Abstract: An impurity concentration profile that improves pn junction breakdown voltage and mitigates the electric field, and that does not adversely affect the characteristics of a field effect transistor is realized. An n type source/drain region is formed at a silicon substrate. A p type impurity concentration profile includes respective peak concentrations at a dope region for forming a p type well, a p type channel cut region, and a p type channel dope region. An impurity concentration profile of the n type source/drain region crosses the p type impurity concentration profile at a low concentration, and includes phosphorus implantation regions indicating impurity concentrations respectively higher than those of the p type channel cut region and the p type channel dope region and respective peaks in impurity concentration at the neighborhood of respective depth thereof.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: March 9, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takaaki Murakami, Kenji Yasumura
  • Patent number: 5838245
    Abstract: A drug storage/discharge apparatus having a cleaning time determining device which can detect dirt in drug discharge paths and determine when it is necessary to clean the discharge paths. A motor control circuit controls each feeder to discharge drugs from the feeder through its discharge opening. A light-emitting diode and a phototransistor are provided opposite to each other at the discharge opening. A drug discharged from the feeder intercepts the light from the light-emitting diode, thus fluctuating the output of the phototransistor. Based on the output fluctuation, the motor control circuit can confirm that a drug has been discharged. A low-pass filter is provided to apply only a low-frequency component of the output of the phototransistor to a comparator. Such low-frequency components represent to what degree the light-emitting diode and phototransitor are soiled.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: November 17, 1998
    Assignee: Kabushiki Kaisha Yuyama Seisakusho
    Inventors: Takaaki Murakami, Kunihiko Kano
  • Patent number: 5831323
    Abstract: There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that t.sub.G represents a thickness of a gate electrode layer 6, a height t.sub.U to an upper surface of a thickest portion of element isolating oxide film 4 from an upper surface of a gate insulating film 5 and an acute angle .theta.i defined between the upper surfaces of element isolating oxide film 4 and gate insulating film are set within ranges expressed by the formula of {.theta.i, t.sub.U .linevert split.0.ltoreq..theta.i.ltoreq.56.6.degree., 0.ltoreq.t.sub.U .ltoreq.0.82t.sub.G }. Thereby, an unetched portion does not remain at an etching step for patterning the gate electrode layer to be formed later. This prevents short-circuit of the gate electrode. Since the element isolating oxide film has the improved flatness, a quantity of overetching in an active region can be reduced at a step of patterning the gate electrode.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: November 3, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kaoru Motonami, Shigeru Shiratake, Hiroshi Matsuo, Yuichi Yokoyama, Kenji Morisawa, Ritsuko Gotoda, Takaaki Murakami, Satoshi Hamamoto, Kenji Yasumura, Yasuyoshi Itoh
  • Patent number: 5821959
    Abstract: An orifice plate wherein a plurality of supply ports to which two or more types of different liquids are supplied are disposed on one surface of a laminated plate comprising three plates laminated to each other and a nozzle for discharging a liquid mixture obtained by mixing two or more types of liquids is disposed on the other surface opposite to the surface on which these plurality of supply ports are disposed, wherein the plate disposed at the intermediate level is made of a photosensitive resin and has a flow path formed in the direction inside the surface of this plate.
    Type: Grant
    Filed: March 26, 1996
    Date of Patent: October 13, 1998
    Assignee: Sony Corporation
    Inventors: Takaaki Murakami, Koichiro Kishima, Makoto Ando, Tetsuo Nakayama
  • Patent number: 5811019
    Abstract: A method for a hole inclined relative to the direction of thickness of a workpiece by light energy. A groove is formed in an energy-concentrated portion of a plate as a workpiece for opening on a major surface of a plate operating as a light energy irradiated surface for forming an irregular surface portion. The light energy is illuminated on this irregular surface portion from the major surface of the plate in an oblique direction relative to the direction of thickness of the plate. The irregular surface portion of the workpiece is formed integrally with the workpiece by injection molding. The irregular surface portion may also be formed by sand-blasting, chemical etching or by an abrasive brush. The light energy is a laser, especially an excimer laser. The workpiece may be formed of an inorganic material, an organic material or a metallic material. The hole of a larger angle of inclination is formed by employing the light energy.
    Type: Grant
    Filed: March 26, 1996
    Date of Patent: September 22, 1998
    Assignee: Sony Corporation
    Inventors: Tetsuo Nakayama, Koichiro Kishima, Makoto Ando, Takaaki Murakami
  • Patent number: 5709063
    Abstract: A device and a method for continuously packing tablets in which the refilling of tablets can be done without stopping the device. The tablet packing machine has a case housing a plurality of tablet feeders. The case is also provided with backup tablet feeders and backup discharge channels through which tablets discharged from the backup tablet feeders are dropped into a hopper in the tablet packing machine. The backup tablet feeders are filled with tablets beforehand. When the stock of tablets in one or some of the tablet feeders decreases to a predetermined level, the backup tablet feeders containing the same kind or kinds of tablets are activated to discharge tablets from these backup feeders. Thus, it is possible to continuously discharge tablets and thus to pack tablets continuously without interruption.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: January 20, 1998
    Assignee: Kabushiki Kaisha Yuyama Seisakusho
    Inventors: Shoji Yuyama, Hiroshi Nose, Takaaki Murakami
  • Patent number: 5671592
    Abstract: A medicine packing apparatus includes medicine storage shelves for storing a large number of medicine containers having medicines contained therein, and a comparatively small number of medicine feeders on each of which one of the large number of medicine containers is set for feeding medicine in a quantity conforming to a prescription. Store location memory means and set location memory means are provided which respectively memorize data on the store location of each individual medicine in the storage shelves and data on set location of the medicine in the feeders. If a medicine container corresponding to a prescription is not present in the set location, a search is made in the storage shelves, and then the searched location of the medicine is indicated accordingly. When a medicine container taken out from the storage shelves is set on one of the feeders, an identification device provided on the medicine container is read by a reader, and data on the set location is stored into a set location memory.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: September 30, 1997
    Assignee: Yuyama Mfg. Co., Ltd.
    Inventors: Shoji Yuyama, Takaaki Murakami, Kunihiko Kano
  • Patent number: 5644350
    Abstract: An ink jet recording apparatus for expelling an ink from a print head (1) toward a recording medium (2) to form an image thereon has a fixing solution head (10) for forming on the recording medium (2) a dye acceptor layer composed of an intercalation compound which fixes and holds a dye of the ink by way of an intercalation. The fixing solution head (10) expels a solution (fixing solution) containing the intercalation compound. The ink jet recording apparatus is capable of forming images of excellent water resistance and light resistance.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: July 1, 1997
    Assignee: Sony Corporation
    Inventors: Makoto Ando, Toshiki Kagami, Takaaki Murakami, Masayuki Sato, Noriko Kasahara, Kengo Ito, Masanobu Hida, Motohiro Mizumachi
  • Patent number: 5623154
    Abstract: An isolating/insulating film is formed on the surface of a p.sup.- silicon substrate in an element isolating region. An nMOS transistor having a pair of n-type source/drain regions is formed within an element forming region isolated by the isolating oxide film. A p.sup.+ impurity diffusion region is formed on the p.sup.- silicon substrate in such a manner as to be contacted with the lower surface of the isolating oxide film in the element isolating region and to extend at a specified depth from the surface of the p.sup.- silicon substrate in the element forming region. A p-type impurity diffusion region having a p-type impurity concentration higher than that of the p.sup.- silicon substrate is formed at the side end portion of the isolating oxide film in such a manner as to be contacted with the n-type source/drain region. With this arrangement, it is possible to reduce leakage current caused by the distribution of crystal defects in a depletion layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 22, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takaaki Murakami, Kenji Yasumura, Shigeru Shiratake
  • Patent number: 5585827
    Abstract: In the printer head of this invention, the base component 1 and the lid component 5 can be easily bonded without clogging the groove 2 that serves as the ink flow channel. The eutectic alloy layer 3 is formed by a eutectic reaction on the bonding surface between the base component 1 having the groove 2 composed of silicon formed thereon and the lid component 5 having the thin gold film 4 formed thereon. Therefore, the base component/and the lid component 5 are bonded to each other.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: December 17, 1996
    Assignee: Sony Corporation
    Inventor: Takaaki Murakami