Abstract: A tuning apparatus of phase-locked loop type having a voltage controlled oscillator which is working as a local oscillator of a tuning circuit, a programmable divider supplied with the output signal from the voltage controlled oscillator, a reference frequency signal generating circuit, a phase comparator supplied with the output signal from the voltage controlled oscillator and the output signal from the reference frequency signal generating circuit, and supplying the output signal to the voltage controlled oscillator, the programmable divider, the reference frequency signal generating circuit and the phase comparator being formed in a single integrated circuit, and a control circuit formed separately from the integrated circuit for supplying a control data to the programmable divider in the single integrated circuit is disclosed, in which the integrated circuit further comprises a memory for memorizing the control data which is serially supplied from the control circuit and supplying the control data to the

Abstract: A variable impedance circuit employing an RIS field effect transistor which greatly reduces distortion at low and high frequencies is obtained by providing means for applying voltages to the RIS field effect transistor at values determined by the following equations: ##EQU1## where V.sub.BG is the backgate voltage, V.sub.D is the voltage applied to the drain, V.sub.S is the voltage applied to the source, V.sub.BO is the DC component of the voltage applied to the substrate, K is a constant, .alpha..sub.1 is a constant, .alpha..sub.2 is a constant, V.sub.GS is the voltage applied to the gate at the end nearest the source, V.sub.GD is voltage applied to the gate at the end nearest the drain and V.sub.GO is a control voltage.

Abstract: A phase comparator includes a first signal input terminal supplied with a reference signal, a second signal input terminal supplied with an input signal to be compared with the reference signal, a first gate circuit having a pair of input terminals and an output terminal, one of the pair of input terminals of which is connected to the first signal input terminal, a second gate circuit having a pair of input terminals and an output terminal, one of the pair of input terminals of which is connected to the second signal input terminal, a first bi-stable circuit having set, reset and output terminals, the set terminal of which is connected to the output terminal of the first gate circuit, a second bi-stable circuit having set, reset and output terminals, the set terminal of which is connected to the output terminal of the second gate circuit, and first and second gate control circuits connected between the other input terminals of the first and second gate circuits and the output terminals of the first and second

Abstract: A frequency synthesized receiver utilizes, as a local oscillator, a phase-locked circuit formed of a reference signal oscillator, a voltage controlled oscillator, a programmable divider, a phase comparator, and a low-pass filter. For tuning to a desired frequency, the dividing ratio of the programmable divider is controlled by an up/down counter connected in parallel with a shift register. The latter is supplied with a clock pulse signal and a binary coded selecting signal furnished from a micro computer. The selecting signal corresponds to a desired broadcast frequency. The up/down counter is caused by the micro computer to count up or down from the count value stored in the shift register, thereby causing the received frequency to rapidly sweep, at predetermined steps of, for example, 100 KHz.

Abstract: A control circuit for signal transmission which comprises a plurality of field effect transistors (which will be hereinafter referred to as simply FETs) with gates of high resistance is disclosed. In this case, the sources and drains of the FETs are connected commonly and connected in parallel to a signal transmission path, their gates are supplied with different voltages, and the mutual conductances among the FETs are selected to be reduced gradually.

Abstract: A field effect transistor having two electrodes and distributed resistance therebetween is disclosed. This device is used as an attenuator when a main signal is applied across one drain electrode and a source and a control voltage is applied between a gate and the source. The output is derived from the other drain electrode.

Abstract: Signal expansion/compression apparatus wherein an input signal is compressed by an exponential factor and then subsequently may be expanded by the reciprocal of that exponential factor, wherein neither the signal compression circuits nor the signal expansion circuits need be provided with exponential amplifiers or logarithmic function generators. The signal compressio circuit includes a plurality of serially-connected voltage controlled amplifiers, a first of such amplifiers receiving the input signal to be compressed and a predetermined one of such amplifiers providing the compressed output signal. A control signal generator is connected to the last of the voltage controlled amplifiers to produce a control voltage which is a function of the output signal of that last amplifier and a reference voltage. This control voltage is supplied to all of the voltage controlled amplifiers so as to determine the respective gains thereof.

Abstract: A thin film resistor is formed of polycrystalline silicon which contains 2 to 45 atomic percent of oxygen and wherein the resistivity of the polycrystalline silicon film varies as a function of the amount of oxygen contained in the film and wherein the resistivity is substantially higher than polycrystalline silicon not containing oxygen.

Abstract: A FET is provided having a linear impedance characteristic over a wide range. It comprises a semiconductor substrate of one impurity type with source and drain regions formed in one surface thereof of opposite highly doped impurity type. An insulating layer overlies said one surface and is of a relative thin thickness between a point above said source region and a point above said drain region, and is of a relative thick thickness throughout the rest of its extent. A polycrystalline resistance layer overlies the insulating layer over its thin thickness portion and over some of the thick portion of the insulating layer lying above the source region. Source and drain electrodes are formed on the insulating layer and have portions thereof extending through windows in the insulating layer into contact with said source and drain regions respectively.