Patents by Inventor Takaaki Yasumoto
Takaaki Yasumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060267711Abstract: A thin-film piezoelectric resonator includes a substrate, and first and second excitation portions. The substrate includes first and second cavities. The first excitation portion is disposed over the first cavity, and includes a first electrode, a first piezoelectric material and a second electrode laminated successively. An overlapping region among the first electrode, the first piezoelectric material and the second electrode defines a contour of a periphery of the first excitation portion. A first distance is defined as a distance from an end of the first excitation portion to an opening end of the first cavity. The second excitation portion is disposed over the second cavity, and includes a third electrode, a second piezoelectric material and a fourth electrode laminated successively. A second distance is defined as a distance from an end of the second excitation portion to an opening end of the second cavity and different from the first distance.Type: ApplicationFiled: March 16, 2006Publication date: November 30, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Naoko Yanase, Kenya Sano, Takaaki Yasumoto, Ryoichi Ohara, Kazuhiko Itaya
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Publication number: 20060001508Abstract: A film bulk acoustic-wave resonator encompasses a substrate having a cavity; a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity; a piezoelectric layer provided on the bottom electrode; and a top electrode provided on the piezoelectric layer having crystal axes oriented along a thickness direction of the piezoelectric layer, a full width at half maximum of the distribution of the orientations of the crystal axes is smaller than or equal to about six degrees.Type: ApplicationFiled: June 30, 2005Publication date: January 5, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryoichi Ohara, Naoko Yanase, Kazuhiko Itaya, Kenya Sano, Takaaki Yasumoto, Kazuhide Abe, Toshihiko Nagano, Michihiko Nishigaki, Takashi Kawakubo
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Publication number: 20050237132Abstract: A film bulk acoustic-wave resonator encompasses (a) a substrate having a cavity, (b) a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity, (c) a piezoelectric layer disposed on the bottom electrode, a planar shape of the piezoelectric layer is defined by a contour, which covers an entire surface of the bottom electrode in a plan view, (d) a top electrode on the piezoelectric layer, (e) an intermediate electrode located between the substrate and the piezoelectric layer, and at the contour of the piezoelectric layer, the intermediate electrode is connected to the bottom electrode in the inside of the contour, and (f) a bottom electrode wiring connected to the intermediate electrode extending from the contour to an outside of the contour in the plan view, wherein a longitudinal vibration mode along a thickness direction of the piezoelectric layer is utilized.Type: ApplicationFiled: April 19, 2005Publication date: October 27, 2005Applicant: Kabushiki Kaisha ToshibaInventors: Kenya Sano, Naoko Yanase, Kazuhiko Itaya, Takaaki Yasumoto, Ryoichi Ohara, Takashi Kawakubo, Takako Motai
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Publication number: 20050194867Abstract: A thin film piezoelectric actuator comprises a driving part at least one end of which is supported by an anchor portion. The driving part includes: a piezoelectric film, a first lower electrode provided under a first region of the piezoelectric film, a second lower electrode provided under a second region different from the first region of the piezoelectric film, a first upper electrode provided opposite to the first lower electrode on the piezoelectric film, a second upper electrode provided opposite to the second lower electrode on the piezoelectric film, a first connection part that electrically connects the first lower electrode and the second upper electrode via a first via hole formed in the piezoelectric film, and a second connection part that electrically connects the second lower electrode and the first upper electrode via a second via hole formed in the piezoelectric film.Type: ApplicationFiled: February 10, 2005Publication date: September 8, 2005Applicant: Kabushiki Kaisha ToshibaInventors: Takashi Kawakubo, Ryoichi Ohara, Tomio Ono, Toshihiko Nagano, Michihiko Nishigaki, Takaaki Yasumoto, Kazuhide Abe, Kenya Sano
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Publication number: 20050184627Abstract: A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.Type: ApplicationFiled: January 27, 2005Publication date: August 25, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenya Sano, Ryoichi Ohara, Naoko Yanase, Takaaki Yasumoto, Kazuhiko Itaya, Takashi Kawakubo, Hiroshi Toyoda, Masahiko Hasunuma, Toshihiko Nagano, Kazuhide Abe, Michihiko Nishigaki, Hironobu Shibata
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Publication number: 20050104204Abstract: A wafer-level package comprises: a first substrate; an electric element provided on the first substrate; a second substrate; an internal electrode pad; a well; and an external electrode pad. The second substrate is opposed to the first substrate with a predetermined gap therebetween. The electric element is provided between the first and second substrates. The internal electrode pad extends onto a first surface of one of the first and the second substrates. The inner electrode pad is connected to the electric element. The well penetrates the one of the first and the second substrates to the internal electrode. The external electrode pad is provided on a second surface of the one of the first and the second substrates and extends onto an inner wall of the well and being connected with the internal electrode pad.Type: ApplicationFiled: September 29, 2004Publication date: May 19, 2005Inventors: Takashi Kawakubo, Takaaki Yasumoto, Kazuhiko Itaya
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Publication number: 20050059375Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.Type: ApplicationFiled: July 15, 2004Publication date: March 17, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kazuhide Abe, Mayumi Morizuka, Ryoichi Ohara, Kenya Sano, Naoko Yanase, Takaaki Yasumoto, Tadahiro Sasaki, Kazuhiko Itaya, Takashi Kawakubo, Hiroshi Yoshida, Ryuichi Fujimoto, Keiichi Yamaguchi, Nobuyuki Itoh, Tooru Kozu, Takeshi Ookubo
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Patent number: 6747529Abstract: A piezoelectric thin film resonator which comprises a first electrode, a second electrode, and a piezoelectric film which is interposed between the first electrode and the second electrode, and formed of an epitaxial ferroelectric thin film containing barium titanate, a spontaneous polarization of the epitaxial ferroelectric thin film being uniaxially orientated in a direction normal to a film surface.Type: GrantFiled: September 6, 2002Date of Patent: June 8, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhide Abe, Naoko Yanase, Takaaki Yasumoto, Ryoichi Ohara, Tatsuo Shimizu, Takashi Kawakubo
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Publication number: 20030058065Abstract: A piezoelectric thin film resonator which comprises a first electrode, a second electrode, and a piezoelectric film which is interposed between the first electrode and the second electrode, and formed of an epitaxial ferroelectric thin film containing barium titanate, a spontaneous polarization of the epitaxial ferroelectric thin film being uniaxially orientated in a direction normal to a film surface.Type: ApplicationFiled: September 6, 2002Publication date: March 27, 2003Inventors: Kazuhide Abe, Naoko Yanase, Takaaki Yasumoto, Ryoichi Ohara, Tatsuo Shimizu, Takashi Kawakubo
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Patent number: 6533906Abstract: A method of manufacturing an epitaxially-strained lattice film of an oxide, in which epitaxially-strained lattices having a good crystalline property are formed by applying RF power to a substrate holder and irradiating positive ions having a moderate energy while preventing damage to the strained lattice film to be stacked by oxygen negative ions. This method simultaneously overcomes both the problem of damage to the film by irradiation of oxygen negative ions, which is peculiar to sputtering of oxides, and the problem of failure to strain due to relaxation of the strain during deposition.Type: GrantFiled: March 1, 2001Date of Patent: March 18, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Takashi Kawakubo, Takaaki Yasumoto, Kazuhide Abe, Naoko Yanase
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Publication number: 20010027167Abstract: A method of manufacturing an epitaxially-strained lattice film of an oxide, in which epitaxially-strained lattices having a good crystalline property are formed by applying RF power to a substrate holder and irradiating positive ions having a moderate energy while preventing damage to the strained lattice film to be stacked by oxygen negative ions. This method simultaneously overcomes both the problem of damage to the film by irradiation of oxygen negative ions, which is peculiar to sputtering of oxides, and the problem of failure to strain due to relaxation of the strain during deposition.Type: ApplicationFiled: March 1, 2001Publication date: October 4, 2001Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takashi Kawakubo, Takaaki Yasumoto, Kazuhide Abe, Naoko Yanase
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Patent number: 5907187Abstract: In such electronic components as semiconductor packages and semiconductor chips which are possessed of groups of connecting bumps as input and output terminals, the groups of connecting bumps comprise not less than two kinds of connecting bumps different in melting point or not less than two kinds of connecting bumps different in mechanical strength. The groups of connecting bumps comprise connecting bumps made of high temperature solder or connecting bumps made of a high strength In type solder in the part of formation thereof. The connecting bumps made of high temperature solder are not directly affected by the influence of displacement because they retain the shape of a ball even after the step of connection such as solder reflow. The connecting bumps made of In type solder form connecting parts of high strength. These groups of connecting bumps contribute to exalt the reliability of the connecting parts without decreasing the number of input and output terminals.Type: GrantFiled: July 14, 1995Date of Patent: May 25, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Kaoru Koiwa, Koji Yamakawa, Kiyoshi Iyogi, Takaaki Yasumoto, Nobuo Iwase
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Patent number: 5821627Abstract: An electronic circuit device includes a substrate, a wiring layer formed on the surface of the substrate and essentially consisting of at least one metal selected from the group consisting of gold, copper, tin, and aluminum, a bump formed on the wiring layer and essentially consisting of at least one metal selected from the group consisting of gold, copper, and aluminum, and a micro electronic element formed on the bump, wherein solid-phase diffusion bonding is performed at least either between the wiring layer and the bump or between the bump and an electrode of the micro electronic element.Type: GrantFiled: November 5, 1997Date of Patent: October 13, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Miki Mori, Yukio Kizaki, Takaaki Yasumoto, Koji Yamakawa, Masayuki Saito, Tatsuro Uchida, Takasi Togasaki, Takashi Yebisuya, Taijun Murakami
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Patent number: 5622769Abstract: According to this invention, there is disclosed a thermal conductivity substrate which includes an aluminum nitride sintered body and a coating layer formed on the body of aluminum phosphate and having a surface roughness of 1 .mu.m or less, and which has excellent humidity resistance and chemical resistance.Type: GrantFiled: February 10, 1994Date of Patent: April 22, 1997Assignee: Kabushiki Kaisha ToshibaInventors: Shoji Kozuka, Masaru Hayashi, Katsuyoshi Oh-Ishi, Takaaki Yasumoto, Nobuo Iwase, Hiroshi Endo, Koji Yamakawa, Kaoru Koiwa, Kiyoshi Iyogi
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Patent number: 5412160Abstract: A circuit board comprising a substrate, at least one dielectric film formed on the substrate and made of at least one selected from the group consisting of AlN, BN, diamond, diamond-like carbon, BeO and SiC, the dielectric film having pores of a porosity of 5 to 95% by volume, and at least one wiring metal film formed on the dielectric film.Type: GrantFiled: March 15, 1994Date of Patent: May 2, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Takaaki Yasumoto, Nobuo Iwase, Kaoru Koiwa, Koji Yamakawa, Kiyoshi Iyogi
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Patent number: 5326623Abstract: A circuit board including a circuit pattern adhered firmly to a ceramic substrate and capable of eliminating an increase in resistivity due to an influence of an external environment, particularly, a thermal influence is disclosed. The circuit board comprises a ceramic substrate, and a circuit pattern formed on the substrate and having a multilayered structure in which a bonding layer comprising Ti and at least one element selected from the group consisting of N and O, a conductor layer consisting essentially of Cu, and a protective layer comprising Ti and at least one element selected from the group consisting of N and O are stacked in the order named.Type: GrantFiled: January 28, 1993Date of Patent: July 5, 1994Assignee: Kabushiki Kaisha ToshibaInventors: Koji Yamakawa, Kaoru Koiwa, Takaaki Yasumoto, Kiyoshi Iyogi, Nobuo Iwase
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Patent number: 5070393Abstract: An overcoat layer possessing an insulating property is formed only in the necessary part on a ceramic substrate formed of a sintered aluminum nitride. An aluminum nitride substrate for the formation of a thin-film conductor layer thereon is composed of the ceramic substrate and the overcoat layer both mentioned above. The overcoat layer serves the purpose of alleviating the jogging contour of the surface of the sintered aluminum nitrate and enhancing the smoothness of this surface. A semiconductor device is produced by forming a thin-film conductor layer destined to constitute a circuit part on the overcoat layer. The excellence in the surface smoothness of the overcoat layer enhances the reliability of the thin-film conductor layer in a great measure. Semiconductor elements are mounted on the exposed part of the sintered aluminum nitride where the overcoat layer is absent.Type: GrantFiled: December 22, 1989Date of Patent: December 3, 1991Assignee: Kabushiki Kaisha ToshibaInventors: Noriko Nakagawa, Takaaki Yasumoto, Toshio Nakai
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Patent number: 5041700Abstract: A circuit board includes an aluminum nitride substrate, and a circuit pattern formed on the substrate and having a multilayered structure in which a metal oxynitride layer represented by formula Al.sub.u Ml.sub.v M2.sub.x O.sub.y N.sub.z (wherein M1 represents a metal selected from the group consisting of Ti, Cr, Ta, and Zr, M2 represents a metal selected from the group consisting of Ni, Pt, Pd, W, Nb, and Mo, u represents 3 to 50 atm %, v represents 3 to 78 atm %, x represents 0 to 50 atm %, y represents 0.005 to 25 atm %, and z represents 5 to 70 atm %), a bonding layer consisting essentially of a metal represented by M1, a barrier layer consisting essentially of a metal represented by M2, and a conductor layer consisting essentially of Au are stacked in the order named.Type: GrantFiled: September 27, 1990Date of Patent: August 20, 1991Assignee: Kabushiki Kaisha ToshibaInventors: Kiyoshi Iyogi, Takaaki Yasumoto, Toshirou Yanazawa, Nobuo Iwase
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Patent number: 4963701Abstract: Disclosed is an aluminum nitride thin film circuit board having an aluminum nitride substrate and a conductive thin film pattern formed on the substrate. The conductive thin film pattern has a multi-layer structure selected from the group consisting of Ti/Ni/Au, Ti/Pd/Au, Ti/Pt/Au, Ni/Au, Cr/Au, and Cr/Cu/Au, and a boundary layer of Al-N-M-O (M is Ti, Ni, or Cr) is formed between the substrate and the conductive thin film pattern. Since the boundary layer is formed, bonding properties between the substrate and the conductive thin film pattern are improved. In particular, when the boundary layer contains 0.02 to 30 atomic % of oxygen, a higher bonding strength can be obtained.Type: GrantFiled: January 24, 1989Date of Patent: October 16, 1990Assignee: Kabushiki Kaisha ToshibaInventors: Takaaki Yasumoto, Nobuo Iwase
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Patent number: 4919731Abstract: The present invention provides an electronic component part with terminal pins very closely and very strongly bonded to a high thermal conductivity ceramics circuit board and a method for simply and continuously manufacturing electronic component parts, with a high operability, each with terminal pins bonded to a high thermal conductivity ceramics circuit board. According to the present invention, an electronic component part is provided in which terminal pins are bonded to a high thermal conductivity ceramics circuit board by a brazing metal, containing at least one kind of Group IVa elements.Type: GrantFiled: February 10, 1989Date of Patent: April 24, 1990Assignee: Kabushiki Kaisha ToshibaInventors: Kiyoshi Iyogi, Takaaki Yasumoto, Toshirou Yanazawa, Nobuo Iwase, Masako Nakahashi, Hiromitsu Takeda