Patents by Inventor Takahiro Hirai

Takahiro Hirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160079257
    Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.
    Type: Application
    Filed: September 3, 2015
    Publication date: March 17, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi SONEHARA, Takahiro HIRAI, Masaaki HIGUCHI, Takashi SHIMIZU
  • Patent number: 9190499
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory element region and a capacitance element region. The capacitance region including: a second stacked body, each of a plurality of second electrode layers and each of a plurality of second insulating layers being stacked alternately; a plurality of conductive layers; and a second insulating film provided between each of the plurality of conductive layers and each of the plurality of second electrode layers. In the capacitance element region, a first capacitor is made of one of the plurality of second insulating layers and a pair of the second electrode layers sandwiching the one of the plurality of second insulating layers, and a second capacitor is made of the second insulating film, and one of the plurality of second electrode layers and one of the plurality of conductive layers sandwiching the second insulating film.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: November 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahiro Hirai, Masaru Kito
  • Publication number: 20140284688
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory element region and a capacitance element region. The capacitance region including: a second stacked body, each of a plurality of second electrode layers and each of a plurality of second insulating layers being stacked alternately; a plurality of conductive layers; and a second insulating film provided between each of the plurality of conductive layers and each of the plurality of second electrode layers. In the capacitance element region, a first capacitor is made of one of the plurality of second insulating layers and a pair of the second electrode layers sandwiching the one of the plurality of second insulating layers, and a second capacitor is made of the second insulating film, and one of the plurality of second electrode layers and one of the plurality of conductive layers sandwiching the second insulating film.
    Type: Application
    Filed: August 20, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takahiro HIRAI, Masaru Kito
  • Patent number: 8701621
    Abstract: There is provided a four-cycle engine which can appropriately circulate oil in an engine regardless of a tilted condition with a simple structure. A crankcase (4) of a four-cycle engine (1) has a crank room (41) which rotatably supports a crankshaft (10) and an oil room (42) which is provided adjacent to the exterior of the crank room (41). The crankcase (4) also has partition walls (43) and (44) which partition the interior of the crankcase (4) into the crank room (41) and the oil room (42), respectively, and a communication path (45) which communicates the crank room (41) with the oil room (42). The partition walls (43) and (44) each has a cross section formed in a substantially V shape, and the communication path (45) is formed at an apex between the partition walls (43) and (44).
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: April 22, 2014
    Assignee: Hitachi Koki Co., Ltd.
    Inventors: Takeshi Takeda, Takamoto Horiuchi, Hiroshi Ohira, Takahiro Hirai, Katsumi Kurihara
  • Publication number: 20140037482
    Abstract: A working machine has an oil groove communicating a pump chamber with a gear chamber, and a small amount of oil is delivered to the gear chamber when oil is discharged from the pump chamber. Thus, the oil adheres to the outer peripheral surface of a rotating pump shaft and is kept remaining between a pump case and the pump shaft. Therefore, the viscosity is increased and a pressure loss between the pump chamber and the gear chamber is increased. Accordingly, the airtightness can be maintained, and the stable and inexpensive oil pump mechanism requiring less man-hour can be realized without depending on the accuracy of a gap between the pump case and the pump shaft. Since oil is kept remaining on the outer peripheral surface of the pump shaft, it is possible to prevent the pump case from being worn out and to improve the durability of components.
    Type: Application
    Filed: July 24, 2013
    Publication date: February 6, 2014
    Applicant: HITACHI KOKI CO., LTD.
    Inventor: Takahiro HIRAI
  • Patent number: 8581424
    Abstract: According to one embodiment, an information recording/reproducing device including a semiconductor substrate, a first interconnect layer on the semiconductor substrate, a first memory cell array layer on the first interconnect layer, and a second interconnect layer on the first memory cell array layer. The first memory cell array layer comprises an insulating layer having an alignment mark, and a stacked layer structure on the insulating layer and including a storage layer and an electrode layer. All of the layers in the stacked layer structure comprises a material with a permeability of visible light of 1% or more.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: November 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahiro Hirai, Tsukasa Nakai, Kohichi Kubo, Chikayoshi Kamata, Takayuki Tsukamoto, Shinya Aoki
  • Patent number: 8431920
    Abstract: According to one embodiment, an information recording and reproducing device includes a recording layer which includes a typical element and a transition element, and stores a state of a first electric resistivity and a state of a second electric resistivity different from the first electric resistivity by a movement of the typical element, and an electrode layer which is disposed at one end of the recording layer to apply a voltage or a current to the recording layer. The recording layer includes a first region which is in contact with the electrode layer and the electrode layer includes a second region which is in contact with the recording layer. The first and second regions are opposite to each other. And the first and second regions include the typical element, and a concentration of the typical element in the second region is higher than that in the first region.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: April 30, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chikayoshi Kamata, Takayuki Tsukamoto, Takeshi Yamaguchi, Tsukasa Nakai, Takahiro Hirai, Shinya Aoki, Kohichi Kubo
  • Patent number: 8305797
    Abstract: According to one embodiment, an information recording/reproducing device includes a recording layer and a driver section. The recording layer has a first layer including a first compound. The first compound includes a mixed crystal of a first oxide containing a first metallic element and a second oxide. The second oxide has a crystal structure being same as the first oxide and contains a second metallic element different from the first metallic element. The driver section is configured to produce state change in the recording layer to record information by at least one of application of voltage to the recording layer and passage of current to the recording layer. Composition ratio of an element having a smaller ionic radius of the first and second metallic elements is not less than percolation threshold of a lattice formed of ions of the first and second metallic elements based on the crystal structure.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: November 6, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinya Aoki, Kohichi Kubo, Takayuki Tsukamoto, Takahiro Hirai, Chikayoshi Kamata, Tsukasa Nakai
  • Patent number: 8288748
    Abstract: According to one embodiment, an information recording and reproducing device includes a first layer, a second layer, and a recording layer between the first and second layers, which is capable of a transition between a first state of a low resistance and a second state of a high resistance by flowing a current between the first and second layers. A peripheral portion of the recording layer has a composition different from that of a center portion of the recording layer. The center portion includes two kinds of cation elements. And the center portion is different from the peripheral portion in a ratio of the two kinds of cation elements.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: October 16, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Tsukamoto, Chikayoshi Kamata, Takeshi Yamaguchi, Takahiro Hirai, Shinya Aoki, Kohichi Kubo
  • Patent number: 8269205
    Abstract: According to one embodiment, an information recording and reproducing device includes a first layer, a second layer and a recording layer. The recording layer is provided between the first layer and the second layer and being capable of reversibly changing between a first state having a first resistance and a second state having a second resistance higher than the first resistance. The recording layer includes a first compound layer and a second compound layer. The first compound layer contains a first compound. The first compound includes a first cation element and a second cation element of a type different from the first cation element. The second compound layer contains a second compound. The second compound includes a transition element having a d-orbital partially filled with electron, and the second compound includes a void site capable of storing at least one of the first cation element and the second cation element.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: September 18, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kohichi Kubo, Chikayoshi Kamata, Takayuki Tsukamoto, Shinya Aoki, Takahiro Hirai, Tsukasa Nakai, Toshiro Hiraoka
  • Publication number: 20120217461
    Abstract: A semiconductor memory device according to an embodiment includes: first lines provided on a substrate; second lines provided between the first lines and the substrate so as to intersect the first lines; and a first memory cell array including first memory cells, each of the first memory cells being provided at respective intersections of the first lines and the second lines and including a current rectifying element and a variable resistor connected in series. The variable resistor of the first memory cell includes a first recording layer and a second recording layer, the first recording layer being made of an oxide of a first metal material, the second recording layer being made of the first metal material and being formed so as to contact with the first recording layer. The second recording layer is closer to the first line than the first recording layer is.
    Type: Application
    Filed: February 24, 2012
    Publication date: August 30, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeki KOBAYASHI, Takashi Shigeoka, Mitsuru Sato, Takahiro Hirai, Katsuyuki Sekine, Kazuya Kinoshita, Soichi Yamazaki, Ryota Fujitsuka, Kensuke Takahashi, Yasuhiro Nojiri, Masaki Yamato, Hiroyuki Fukumizu, Takeshi Yamaguchi
  • Patent number: 8237145
    Abstract: According to one embodiment, a nonvolatile memory device includes a stacked body including a first layer, a second layer and a recording layer. The recording layer is provided between the first layer and the second layer. The recording layer is capable of reversibly changing between a first state and a second state having a resistance higher than a resistance in the first state by a current supplied via the first layer and the second layer. The recording layer includes a first portion and a second portion provided in a plane of a major surface of the recording layer. The second portion has a nitrogen amount higher than a nitrogen amount in the first portion.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: August 7, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chikayoshi Kamata, Takayuki Tsukamoto, Kohichi Kubo, Shinya Aoki, Takahiro Hirai, Toshiro Hiraoka
  • Publication number: 20120180322
    Abstract: There is provided a four-cycle engine which can appropriately circulate oil in an engine regardless of a tilted condition with a simple structure. A crankcase (4) of a four-cycle engine (1) has a crank room (41) which rotatably supports a crankshaft (10) and an oil room (42) which is provided adjacent to the exterior of the crank room (41). The crankcase (4) also has partition walls (43) and (44) which partition the interior of the crankcase (4) into the crank room (41) and the oil room (42), respectively, and a communication path (45) which communicates the crank room (41) with the oil room (42). The partition walls (43) and (44) each has a cross section formed in a substantially V shape, and the communication path (45) is formed at an apex between the partition walls (43) and (44).
    Type: Application
    Filed: September 22, 2010
    Publication date: July 19, 2012
    Inventors: Takeshi Takeda, Takamoto Horiuchi, Hiroshi Ohira, Takahiro Hirai, Katsumi Kurihara
  • Patent number: 8207518
    Abstract: According to one embodiment, an information recording and reproducing device includes a first layer, a second layer and a recording layer. The recording layer is provided between the first layer and the second layer and being capable of reversibly changing between a first state having a first resistance and a second state having a second resistance higher than the first resistance by a current supplied via the first layer and the second layer. The recording layer includes a first compound layer and an insulating layer. The first compound layer contains a first compound. The first compound includes a first cation element and a second cation element of a type different from the first cation element. The insulating layer contains a third compound, and the third compound includes an element selected from group 1 to 4 elements and group 12 to 17 elements in the periodic table.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: June 26, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kohichi Kubo, Chikayoshi Kamata, Takayuki Tsukamoto, Shinya Aoki, Takahiro Hirai, Tsukasa Nakai, Toshiro Hiraoka
  • Patent number: 8188455
    Abstract: An information recording/reproducing device includes a recording layer, and a recording circuit which records data to the recording layer by generating a phase change in the recording layer. The recording layer includes a first chemical compound having a spinel structure. The recording layer is AxMyX4 (0.1?x?2.2, 1.0?y?2.0), where A includes one selected from a group of Zn, Cd and Hg, M includes one selected from a group of Ti, Zr, Hf, V, Nb and Ta, and X includes O.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: May 29, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Tsukamoto, Kohichi Kubo, Chikayoshi Kamata, Takahiro Hirai, Shinya Aoki, Toshiro Hiraoka
  • Patent number: 8139398
    Abstract: A data read/write device according to an example of the present invention includes a recording layer, and means for applying a voltage to the recording layer, generating a resistance change in the recording layer, and recording data. The recording layer is composed of a composite compound having at least two types of cation elements, at least one type of the cation element is a transition element having a ā€œdā€ orbit in which electrons have been incompletely filled, and the shortest distance between the adjacent cation elements is 0.32 nm or less.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: March 20, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kubo, Takahiro Hirai, Shinya Aoki, Robin Carter, Chikayoshi Kamata
  • Publication number: 20120061732
    Abstract: According to one embodiment, an information recording/reproducing device including a semiconductor substrate, a first interconnect layer on the semiconductor substrate, a first memory cell array layer on the first interconnect layer, and a second interconnect layer on the first memory cell array layer. The first memory cell array layer comprises an insulating layer having an alignment mark, and a stacked layer structure on the insulating layer and including a storage layer and an electrode layer. All of the layers in the stacked layer structure comprises a material with a permeability of visible light of 1% or more.
    Type: Application
    Filed: September 9, 2011
    Publication date: March 15, 2012
    Inventors: Takahiro HIRAI, Tsukasa NAKAI, Kohichi KUBO, Chikayoshi KAMATA, Takayuki TSUKAMOTO, Shinya AOKI
  • Patent number: 8089796
    Abstract: According to one embodiment, an information recording and reproducing device includes a first layer, a second layer and a recording layer. The recording layer is provided between the first and second layers and is capable of reversibly transitioning between a first state and a second state with a resistance higher than in the first state. One of the first and second layers includes a resistivity distribution layer perpendicular to a stacking direction of the first and second layers, and the recording layer. The resistivity distribution layer includes a low and a high resistivity portion. Resistivity of the high resistivity portion is higher than resistivity of the low resistivity portion. The low resistivity portion contains a transition element identical to a transition element contained in the high resistivity portion.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: January 3, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Tsukamoto, Takeshi Yamaguchi, Chikayoshi Kamata, Tsukasa Nakai, Takahiro Hirai, Shinya Aoki, Kohichi Kubo
  • Patent number: 8018762
    Abstract: An information recording and reproducing apparatus, includes: a stacked structure including an electrode layer and a recording layer; a buffer layer added to the electrode layer; and a voltage application unit configured to apply a voltage to the recording layer, produce a phase change in the recording layer, and record information. The recording layer includes a first layer including a first compound having an ilmenite structure represented by AxMyX3 (0.1?x?1.1 and 0.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: September 13, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kohichi Kubo, Chikayoshi Kamata, Takayuki Tsukamoto, Shinya Aoki, Takahiro Hirai, Toshiro Hiraoka
  • Publication number: 20110216576
    Abstract: According to one embodiment, an information recording/reproducing device includes a recording layer and a driver section. The recording layer has a first layer including a first compound. The first compound includes a mixed crystal of a first oxide containing a first metallic element and a second oxide. The second oxide has a crystal structure being same as the first oxide and contains a second metallic element different from the first metallic element. The driver section is configured to produce state change in the recording layer to record information by at least one of application of voltage to the recording layer and passage of current to the recording layer. Composition ratio of an element having a smaller ionic radius of the first and second metallic elements is not less than percolation threshold of a lattice formed of ions of the first and second metallic elements based on the crystal structure.
    Type: Application
    Filed: March 9, 2011
    Publication date: September 8, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinya Aoki, Kohichi Kubo, Takayuki Tsukamoto, Takahiro Hirai, Chikayoshi Kamata, Tsukasa Nakai