Patents by Inventor Takahiro Kuriyama

Takahiro Kuriyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6982624
    Abstract: A chip resistor includes an insulating chip substrate, a resistor film formed on the substrate, a pair of upper electrodes formed from silver paste to be connected to the resistor film, a cover coat covering the resistor film, an auxiliary electrode formed on each of the upper electrodes to partially overlap the cover coat, a side electrode formed on each of the side surfaces of the substrate to be connected to the upper electrode and the auxiliary electrode, a nickel-plated layer covering the auxiliary electrode and the side electrode, and a soldering layer covering the nickel-plated layer. The side electrode is made from nonmagnetic conductive resin paste, whereas the auxiliary upper electrode is made from carbon-based conductive resin paste.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: January 3, 2006
    Assignee: Rohm Co., Ltd.
    Inventors: Daisuke Saito, Takahiro Kuriyama, Masato Doi
  • Publication number: 20050285713
    Abstract: A fixed resistor network has an insulating substrate, a plurality of film resistors arranged on a top surface of the insulating substrate, terminal electrodes formed for the film resistors on each lengthwise sidewall of the insulating substrate at a given pitch along the sidewall, and recesses provided between the terminal electrodes. The occurrence of solder bridges between the terminal electrodes during solder mounting and the occurrence of chipping in the terminal-electrode-forming areas between the recesses on the lengthwise sidewall are both reduced by making the width of the recesses along the lengthwise sidewall either 0.44 to 0.48 times or 0.525 to 0.625 times the pitch.
    Type: Application
    Filed: October 28, 2003
    Publication date: December 29, 2005
    Applicant: ROHM CO., LTD.
    Inventor: Takahiro Kuriyama
  • Patent number: 6861941
    Abstract: A chip resistor including an elongated chip substrate, a resistive layer formed on the substrate, a silver-containing upper electrode connected to the resistive layer, an undercoat enclosing the resistive layer and extending onto part of the upper electrode, an auxiliary electrode connected to the upper electrode and extending onto part of the undercoat, and overcoat enclosing the undercoat and extending onto part of the auxiliary electrode. In the longitudinal direction of the substrate The undercoat extends longitudinally of the substrate beyond the overcoat, so that the extremity of the undercoat is offset from the extremity of the overcoat by an appropriate distance.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: March 1, 2005
    Assignee: Rohm Co., Ltd.
    Inventor: Takahiro Kuriyama
  • Patent number: 6856234
    Abstract: A chip resistor includes an insulating substrate 2 in the form of a chip having an upper surface and an opposite pair of side surfaces, a resistor film 4 formed on the upper surface of the insulating substrate 2, a pair of upper electrodes 5 formed on the upper surface of the insulating substrate 2 to flank the resistor film 4 in electrical connection thereto, a cover coat 6 covering the resistor film 4, an auxiliary upper electrode 7 formed on each of the upper electrodes 5 and including a first portion 7a adjoining the relevant side surface of the insulating substrate 2 and a second portion 7b overlapping the cover coat 6, and a side electrode 8 formed on each of the side surfaces of the insulating substrate 2 and electrically connected to at least the upper electrode 5 and the auxiliary upper electrode 7.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: February 15, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Takahiro Kuriyama, Masato Doi
  • Patent number: 6806167
    Abstract: A method of making a chip-type electronic device includes a first through a third process steps. In the first step, a first electrode is formed on an insulating aggregate board. In the second step, a second electrode overlapping the first electrode is formed on the aggregate board. In the third step, the aggregate board is cut along a predetermined cutting line. The first electrode is formed as spaced from the cutting line, whereas the second electrode extends over the cutting line.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: October 19, 2004
    Assignee: Rohm Co., Ltd.
    Inventor: Takahiro Kuriyama
  • Publication number: 20040164842
    Abstract: A chip resistor includes an insulating substrate 2 in the form of a chip having an upper surface and an opposite pair of side surfaces, a resistor film 4 formed on the upper surface of the insulating substrate 2, a pair of upper electrodes 5 formed on the upper surface of the insulating substrate 2 to flank the resistor film 4 in electrical connection thereto, a cover coat 6 covering the resistor film 4, an auxiliary upper electrode 7 formed on each of the upper electrodes 5 and including a first portion 7a adjoining the relevant side surface of the insulating substrate 2 and a second portion 7b overlapping the cover coat 6, and a side electrode 8 formed on each of the side surfaces of the insulating substrate 2 and electrically connected to at least the upper electrode 5 and the auxiliary upper electrode 7.
    Type: Application
    Filed: February 23, 2004
    Publication date: August 26, 2004
    Applicant: ROHM CO., LTD.
    Inventors: Takahiro Kuriyama, Masato Doi
  • Publication number: 20040164841
    Abstract: A chip resistor includes an insulating chip substrate, a resistor film formed on the substrate, a pair of upper electrodes formed from silver paste to be connected to the resistor film, a cover coat covering the resistor film, an auxiliary electrode formed on each of the upper electrodes to partially overlap the cover coat, a side electrode formed on each of the side surfaces of the substrate to be connected to the upper electrode and the auxiliary electrode, a nickel-plated layer covering the auxiliary electrode and the side electrode, and a soldering layer covering the nickel-plated layer. The side electrode is made from nonmagnetic conductive resin paste, whereas the auxiliary upper electrode is made from carbon-based conductive resin paste.
    Type: Application
    Filed: February 23, 2004
    Publication date: August 26, 2004
    Applicant: ROHM CO., LTD.
    Inventors: Daisuke Saito, Takahiro Kuriyama, Masato Doi
  • Publication number: 20040160303
    Abstract: A chip resistor including an elongated chip substrate, a resistive layer formed on the substrate, a silver-containing upper electrode connected to the resistive layer, an undercoat enclosing the resistive layer and extending onto part of the upper electrode, an auxiliary electrode connected to the upper electrode and extending onto part of the undercoat, and overcoat enclosing the undercoat and extending onto part of the auxiliary electrode. In the longitudinal direction of the substrate The undercoat extends longitudinally of the substrate beyond the overcoat, so that the extremity of the undercoat is offset from the extremity of the overcoat by an appropriate distance.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 19, 2004
    Applicant: ROHM CO., LTD.
    Inventor: Takahiro Kuriyama
  • Publication number: 20030092250
    Abstract: A method of making a chip-type electronic device includes a first through a third process steps. In the first step, a first electrode is formed on an insulating aggregate board. In the second step, a second electrode overlapping the first electrode is formed on the aggregate board. In the third step, the aggregate board is cut along a predetermined cutting line. The first electrode is formed as spaced from the cutting line, whereas the second electrode extends over the cutting line.
    Type: Application
    Filed: October 17, 2002
    Publication date: May 15, 2003
    Applicant: ROHM CO., LTD.
    Inventor: Takahiro Kuriyama
  • Patent number: 6556837
    Abstract: Closed-loop transmitting power control method is disclosed that employs a variable updating amount. At a receiver, the presence or absence of frame errors in a received signal from a transmitter is determined using CRC coding. If frame errors do not occur, a downward updating amount, which is an updating amount for lowering a reference value, is set according to the magnitude of the reference Eb/I0 value, the reference Eb/I0 value is lowered by this downward updating amount, and an error incidence flag is turned OFF. If frame errors are detected, an upward updating amount, which is an updating amount for raising the reference value, is set according to the logical state of the error incidence flag, the reference Eb/I0 value is raised by the upward updating amount, and the error incidence flag is turned ON.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: April 29, 2003
    Assignee: NEC Corporation
    Inventor: Takahiro Kuriyama
  • Publication number: 20020148106
    Abstract: A method of making a chip resistor is provided. The method includes the following steps. First, a resistive element is provided on a substrate. Then, a resin layer is formed on the substrate to enclose the resistive element. Then, the substrate and the resin layer are cut in this order. To prevent the breakage of the substrate during the cutting, the resin layer has better machinability than the substrate.
    Type: Application
    Filed: April 15, 2002
    Publication date: October 17, 2002
    Inventors: Torayuki Tsukada, Takahiro Kuriyama